| 2023 | RC | Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture. | Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler |
| 2023 | RC | Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures. | Abhoy Kole, Kamalika Datta, Philipp Niemann, Indranil Sengupta, Rolf Drechsler |
| 2022 | DSD | Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles. | Kamalika Datta, Saeideh Shirinzadeh, Phrangboklang Lyngton Thangkhiew, Indranil Sengupta, Rolf Drechsler |
| 2022 | DSD | SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library. | Abhoy Kole, Kamalika Datta, Indranil Sengupta, Rolf Drechsler |
| 2022 | GI | Mapping Quantum Circuits to 2-Dimensional Quantum Architectures. | Kamalika Datta, Abhoy Kole, Indranil Sengupta, Rolf Drechsler |
| 2022 | VLSID | Easily-Verifiable Design of Non-Scan Sequential Machines for Conformance Checking. | Habibur Rahaman, Santanu Chattopadhyay, Indranil Sengupta, Debesh K. Das, Bhargab B. Bhattacharya |
| 2021 | RC | Efficient Construction of Functional Representations for Quantum Algorithms. | Lukas Burgholzer, Rudy Raymond, Indranil Sengupta, Robert Wille |
| 2019 | ASPDAC | A staircase structure for scalable and efficient synthesis of memristor-aided logic. | Alwin Zulehner, Kamalika Datta, Indranil Sengupta, Robert Wille |
| 2019 | CIT | Fault Coverage Enhancement via Weighted Random Pattern Generation in BIST Using a DNN-Driven-PSO Approach. | Hillol Maity, Kaushik Khatua, Santanu Chattopadhyay, Indranil Sengupta, Girish Patankar, Parthajit Bhattacharya |
| 2019 | VLSID | Exploiting Negative Control Lines and Nearest Neighbor for Improved Comparator Design. | Tathagato Bose, Kamalika Datta, Indranil Sengupta |
| 2019 | VLSID | Design and Implementation of Threshold Logic Functions Using Memristors. | Yaswanth Krishna Yadav Danaboina, Pravanjan Samanta, Kamalika Datta, Indrajit Chakrabarti, Indranil Sengupta |
| 2019 | VLSID | Mapping of Boolean Logic Functions onto 3D Memristor Crossbar. | Naveen Murali G, Peddireddi Satya Vardhan, F. Lalchhandama, Kamalika Datta, Indranil Sengupta |
| 2019 | Tencon | A Deep Neural Network Augmented Approach for Fixed Polarity AND-XOR Network Synthesis. | Kaushik Khatua, Hillol Maity, Santanu Chattopadhyay, Indranil Sengupta, Girish Patankar, Parthajit Bhattacharya |
| 2017 | ASPDAC | Reservoir and mixer constrained scheduling for sample preparation on digital microfluidic biochips. | Varsha Agarwal, Ananya Singla, Mahammad Samiuddin, Sudip Roy, Tsung-Yi Ho, Indranil Sengupta, Bhargab B. Bhattacharya |
| 2017 | RC | Test Pattern Generation Effort Evaluation of Reversible Circuits. | Abhoy Kole, Robert Wille, Kamalika Datta, Indranil Sengupta |
| 2017 | RC | Design of Efficient Quantum Circuits Using Nearest Neighbor Constraint in 2D Architecture. | Leniency Marbaniang, Abhoy Kole, Kamalika Datta, Indranil Sengupta |
| 2017 | RC | Improved Decomposition of Multiple-Control Ternary Toffoli Gates Using Muthukrishnan-Stroud Quantum Gates. | P. Mercy Nesa Rani, Abhoy Kole, Kamalika Datta, Indranil Sengupta |
| 2017 | VLSID | A New Logic Encryption Strategy Ensuring Key Interdependency. | Rajit Karmakar, N. Prasad, Santanu Chattopadhyay, Rohit Kapur, Indranil Sengupta |
| 2015 | RC | Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. | Abhoy Kole, Kamalika Datta, Indranil Sengupta, Robert Wille |
| 2015 | VLSID | BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits. | Eleonora Schnborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler |
| 2014 | DDECS | Optimizing DD-based synthesis of reversible circuits using negative control lines. | Eleonora Schnborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler |
| 2014 | VLSID | All Optical Reversible Multiplexer Design Using Mach-Zehnder Interferometer. | Kamalika Datta, Indranil Sengupta |
| 2013 | DAC | An ATE assisted DFD technique for volume diagnosis of scan chains. | Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur |
| 2013 | DSD | A Distributed BIST Scheme for NoC-Based Memory Cores. | Bibhas Ghoshal, Indranil Sengupta |
| 2013 | ETS | Aggresive scan chain masking for improved diagnosis of multiple scan chain failures. | Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur |
| 2013 | INDOCRYPT | Accelerating Sorting of Fully Homomorphic Encrypted Data. | Ayantika Chatterjee, Manish Kaushal, Indranil Sengupta |
| 2013 | RC | Exploiting Negative Control Lines in the Optimization of Reversible Circuits. | Kamalika Datta, Gaurav Rathi, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler |
| 2012 | VLSID | Synthesis of Reversible Circuits Using Heuristic Search Method. | Kamalika Datta, Gaurav Rathi, Indranil Sengupta, Hafizur Rahaman |
| 2012 | VLSID | A Diagnosability Metric for Test Set Selection Targeting Better Fault Detection. | Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur |
| 2012 | VLSID | Design for Security of Block Cipher S-Boxes to Resist Differential Power Attacks. | Bodhisatwa Mazumdar, Debdeep Mukhopadhyay, Indranil Sengupta |
| 2011 | ICISS | Secured Cloud Storage Scheme Using ECC Based Key Management in User Hierarchy. | Atanu Basu, Indranil Sengupta, Jamuna Kanta Sing |
| 2011 | VLSID | Multiple Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization. | Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur |
| 2010 | EUC | A Distributed Trust Model for Securing Mobile Ad Hoc Networks. | Pushpita Chatterjee, Indranil Sengupta, Soumya Kanti Ghosh |
| 2008 | CIT | Audio Watermarking Based on BCH Coding Using CT and DWT. | Vivekananda Bhat K., Indranil Sengupta, Abhijit Das |
| 2008 | ICDCN | Routing and Wavelength Assignment in All Optical Networks Based on Clique Partitioning. | Tanmay De, Ajit Pal, Indranil Sengupta |
| 2008 | ICISS | Audio Watermarking Based on Quantization in Wavelet Domain. | Vivekananda Bhat K., Indranil Sengupta, Abhijit Das |
| 2008 | VLSID | Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm. | Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta |
| 2007 | Algosensors | Maximal Breach in Wireless Sensor Networks: Geometric Characterization and Algorithms. | Anirvan DuttaGupta, Arijit Bishnu, Indranil Sengupta |
| 2007 | DATE | An area optimized reconfigurable encryptor for AES-Rijndael. | Monjur Alam, Sonai Ray, Debdeep Mukhopadhyay, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta |
| 2007 | DSD | A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography. | Santosh Ghosh, Monjur Alam, Indranil Sengupta, Dipanwita Roy Chowdhury |
| 2007 | ICDCIT | A Key Establishment Scheme for Large-Scale Mobile Wireless Sensor Networks. | Ashok Kumar Das, Indranil Sengupta |
| 2006 | ICDCIT | Optimisation Problems Based on the Maximal Breach Path Measure for Wireless Sensor Network Coverage. | Anirvan DuttaGupta, Arijit Bishnu, Indranil Sengupta |
| 2006 | ICDCN | A Mechanism for Detection and Prevention of Distributed Denial of Service Attacks. | Jaydip Sen, Piyali Roy Chowdhury, Indranil Sengupta |
| 2005 | ICDCIT | Autonomous Agent Based Distributed Fault-Tolerant Intrusion Detection System. | Jaydip Sen, Indranil Sengupta |
| 2002 | VLSID | Reformatting Test Patterns for Testing Embedded Core Based System Using Test Access Mechanism (TAM) Switch. | Subhayu Basu, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, Indranil Sengupta, Sudipta Bhawmik |
| 2000 | ICPADS | Load Balancing with Multiple Token Policy. | Parag Kulkarni, Indranil Sengupta |
| 2000 | VLSID | An ASIC for Cellular Automata Based Message Authentication. | Prabir Dasgupta, Santanu Chattopadhyay, Indranil Sengupta |
| 2000 | VLSID | Cellular Automata Based Deterministic Test Sequence Generator for Sequential Circuits. | Prabir Dasgupta, Santanu Chattopadhyay, Indranil Sengupta |
| 1997 | VLSID | A Design Technique of TSC Checker for Borden's Code. | Gosta Pada Biswas, Indranil Sengupta |
| 1994 | VLSID | On the Synthesis of Gate Matrix Layout. | Reena Agarwal, Indranil Sengupta |