| 2026 | FCCM | Lightweight Queueing Abstraction for Rapid Simulation and Automated Tuning of Input-Dependent Streaming Pipelines on FPGAs. | Shashank Obla, Bin Li, James C. Hoe |
| 2026 | FCCM | Reconfigurable Computing Challenge: RapidScan High-Throughput Parameterized HLS-based Streaming String Matching Library for FPGAs. | Shashank Obla, Tommy Tracy II, Matthew Beck, James C. Hoe, Kevin Skadron, Wajih Ul Hassan |
| 2026 | FPGA | Analysis and Optimization of Input-Dependent Stream Processing Pipelines on FPGAs. | Shashank Obla, Bin Li, James C. Hoe |
| 2025 | FCCM | On Improving the HLS Compatibility of Large C/C++ Code Regions. | Tiago Santos, Joo Bispo, Joo M. P. Cardoso, James C. Hoe |
| 2025 | ISCA | Reconfigurable Stream Network Architecture. | Chengyue Wang, Xiaofan Zhang, Jason Cong, James C. Hoe |
| 2025 | SC | A RISC-V Vector Extension for Multi-word Arithmetic. | Yunhao Lan, Larry Tang, Naifeng Zhang, Youngjin Eum, James C. Hoe, Franz Franchetti |
| 2025 | SC | Hardware-Software Co-Design of Iterative Filter-Update Numerical Methods Using Processing-In-Memory. | Eric Tang, Tianyun Zhang, William Bradford, Farzana Ahmed Siddique, James C. Hoe, Kevin Skadron, Franz Franchetti |
| 2023 | OSDI | Ensō: A Streaming Interface for NIC-Application Communication. | Hugo Sadok, Nirav Atre, Zhipeng Zhao, Daniel S. Berger, James C. Hoe, Aurojit Panda, Justine Sherry, Ren Wang |
| 2022 | SIGCOMM | Pigasus 2.0: making the pigasus IDS robust to attacks and different workloads. | Zhipeng Zhao, Nirav Atre, Hugo Sadok, Siddharth Sahay, Shashank Obla, James C. Hoe, Justine Sherry |
| 2021 | ASPLOS | HerQules: securing programs via hardware-enforced message queues. | Daming D. Chen, Wen Shih Lim, Mohammad Bakhshalipour, Phillip B. Gibbons, James C. Hoe, Bryan Parno |
| 2021 | HotOS | We need kernel interposition over the network dataplane. | Hugo Sadok, Zhipeng Zhao, Valerie Choung, Nirav Atre, Daniel S. Berger, James C. Hoe, Aurojit Panda, Justine Sherry |
| 2020 | FPL | A Service-Oriented Memory Architecture for FPGA Computing. | Joseph Melber, James C. Hoe |
| 2020 | FPL | Partial Reconfiguration for Design Optimization. | Marie Nguyen, Nathan Serafin, James C. Hoe |
| 2020 | OSDI | Achieving 100Gbps Intrusion Prevention on a Single Server. | Zhipeng Zhao, Hugo Sadok, Nirav Atre, James C. Hoe, Vyas Sekar, Justine Sherry |
| 2019 | FCCM | Processor Assisted Worklist Scheduling for FPGA Accelerated Graph Processing on a Shared-Memory Platform. | Yu Wang, James C. Hoe, Eriko Nurvitadhi |
| 2019 | FPL | Quantifying the Benefits of Dynamic Partial Reconfiguration for Embedded Vision Applications. | Marie Nguyen, Robert Tamburo, Srinivasa G. Narasimhan, James C. Hoe |
| 2019 | MICRO | Efficient SpMV Operation for Large and Highly Sparse Matrices using Scalable Multi-way Merge Parallelization. | Fazle Sadi, Joe Sweeney, Tze Meng Low, James C. Hoe, Larry T. Pileggi, Franz Franchetti |
| 2018 | FPL | Time-Shared Execution of Realtime Computer Vision Pipelines by Dynamic Partial Reconfiguration. | Marie Nguyen, James C. Hoe |
| 2017 | FPGA | Using Vivado-HLS for Structural Design: a NoC Case Study (Abstract Only). | Zhipeng Zhao, James C. Hoe |
| 2016 | FPGA | A Study of Pointer-Chasing Performance on Shared-Memory Processor-FPGA Systems. | Gabriel Weisz, Joseph Melber, Yu Wang, Kermin Fleming, Eriko Nurvitadhi, James C. Hoe |
| 2015 | DAC | Nautilus: fast automated IP design space search using guided genetic algorithms. | Michael K. Papamichael, Peter A. Milder, James C. Hoe |
| 2015 | FPL | CoRAM++: Supporting data-structure-specific memory interfaces for FPGA computing. | Gabriel Weisz, James C. Hoe |
| 2015 | ISCA | Data reorganization in memory using 3D-stacked DRAM. | Berkin Akin, Franz Franchetti, James C. Hoe |
| 2015 | ISPASS | DELPHI: a framework for RTL-based architecture design evaluation using DSENT models. | Michael Papamichael, Cagla Cakir, Chen Sun, Chia-Hsin Owen Chen, James C. Hoe, Ken Mai, Li-Shiuan Peh, Vladimir Stojanovic |
| 2015 | MICRO | Enabling portable energy efficiency with memory accelerated library. | Qi Guo, Tze Meng Low, Nikolaos Alachiotis, Berkin Akin, Larry T. Pileggi, James C. Hoe, Franz Franchetti |
| 2014 | FCCM | GraphGen: An FPGA Framework for Vertex-Centric Graph Computation. | Eriko Nurvitadhi, Gabriel Weisz, Yu Wang, Skand Hurkat, Marie Nguyen, James C. Hoe, Jos F. Martnez, Carlos Guestrin |
| 2014 | ICASSP | FFTS with near-optimal memory access through block data layouts. | Berkin Akin, Franz Franchetti, James C. Hoe |
| 2013 | CVPR | 3D Point Cloud Reduction Using Mixed-Integer Quadratic Programming. | Hyun Soo Park, Yu Wang, Eriko Nurvitadhi, James C. Hoe, Yaser Sheikh, Mei Chen |
| 2013 | FPGA | Cross-platform FPGA accelerator development using CoRAM and CONNECT. | Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe |
| 2013 | FPGA | C-to-CoRAM: compiling perfect loop nests to the portable CoRAM abstraction. | Gabriel Weisz, James C. Hoe |
| 2012 | FCCM | Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes. | Berkin Akin, Peter A. Milder, Franz Franchetti, James C. Hoe |
| 2012 | FPGA | Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only). | Berkin Akin, Peter A. Milder, Franz Franchetti, James C. Hoe |
| 2012 | FPGA | Prototype and evaluation of the CoRAM memory architecture for FPGA-based computing. | Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe, Ken Mai |
| 2012 | FPGA | CONNECT: re-examining conventional wisdom for designing nocs in the context of FPGAs. | Michael Papamichael, James C. Hoe |
| 2012 | ICASSP | Improving fixed-point accuracy of FFT cores in O-OFDM systems. | Robert Koutsoyannis, Peter A. Milder, Christian R. Berger, Madeleine Glick, James C. Hoe, Markus Pschel |
| 2011 | FPGA | CoRAM: an in-fabric memory architecture for FPGA-based computing. | Eric S. Chung, James C. Hoe, Ken Mai |
| 2010 | DAC | Automatic multithreaded pipeline synthesis from transactional datapath specifications. | Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timothy Kam |
| 2010 | DATE | Automatic pipelining from transactional datapath specifications. | Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu |
| 2010 | ICASSP | Hardware implementation of the discrete fourier transform with non-power-of-two problem size. | Peter A. Milder, Franz Franchetti, James C. Hoe, Markus Pschel |
| 2010 | ICIP | Fast bilateral filtering by adapting block size. | Wei Yu, Franz Franchetti, James C. Hoe, Yao-Jen Chang, Tsuhan Chen |
| 2010 | MICRO | Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs? | Eric S. Chung, Peter A. Milder, James C. Hoe, Ken Mai |
| 2009 | ASPDAC | Dependable VLSI: device, design and architecture: how should they cooperate? | Shuichi Sakai, Hidetoshi Onodera, Hiroto Yasuura, James C. Hoe |
| 2009 | DATE | Automatic generation of streaming datapaths for arbitrary fixed permutations. | Peter A. Milder, James C. Hoe, Markus Pschel |
| 2009 | ICIP | Real time stereo vision using exponential step cost aggregation on GPU. | Wei Yu, Tsuhan Chen, James C. Hoe |
| 2009 | MEMOCODE | 2009 MEMOCODE Co-Design Contest. | Forrest Brewer, James C. Hoe |
| 2009 | MEMOCODE | Implementing a high-performance multithreaded microprocessor: A case study in high-level design and validation. | Eric S. Chung, James C. Hoe |
| 2009 | PRDC | Chip-Level Redundancy in Distributed Shared-Memory Multiprocessors. | Brian T. Gold, Babak Falsafi, James C. Hoe |
| 2008 | DAC | Formal datapath representation and manipulation for implementing DSP transforms. | Peter A. Milder, Franz Franchetti, James C. Hoe, Markus Pschel |
| 2008 | FPGA | A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. | Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai |
| 2008 | MEMOCODE | MEMOCODE 2008 Co-Design Contest. | Patrick Schaumont, Krste Asanovic, James C. Hoe |
| 2007 | FCCM | Generating FPGA-Accelerated DFT Libraries. | Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryhaila, Franz Franchetti, James C. Hoe, Jos M. F. Moura, Markus Pschel, Jeremy R. Johnson |
| 2007 | MEMOCODE | MEMOCODE 2007 Co-Design Contest. | Forrest Brewer, James C. Hoe |
| 2007 | MICRO | Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding. | Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Falsafi, James C. Hoe |
| 2007 | PRDC | PAI: A Lightweight Mechanism for Single-Node Memory Recovery in DSM Servers. | Jangwoo Kim, Jared C. Smolens, Babak Falsafi, James C. Hoe |
| 2006 | FPGA | Fast and accurate resource estimation of automatically generated custom DFT IP cores. | Peter A. Milder, Mohammad Ahmad, James C. Hoe, Markus Pschel |
| 2006 | ICASSP | Spiral: Joint Runtime and Energy Optimization of Linear Transforms. | Marek R. Telgarsky, James C. Hoe, Jos M. F. Moura |
| 2006 | ISPASS | Simulation sampling with live-points. | Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe |
| 2006 | MICRO | Reunion: Complexity-Effective Multicore Redundancy. | Jared C. Smolens, Brian T. Gold, Babak Falsafi, James C. Hoe |
| 2005 | DAC | Automatic generation of customized discrete fourier transform IPs. | Grace Nordin, Peter A. Milder, James C. Hoe, Markus Pschel |
| 2005 | SIGMETRICS | TurboSMARTS: accurate microarchitecture simulation sampling in minutes. | Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe |
| 2004 | ASPLOS | Fingerprinting: bounding soft-error detection latency and bandwidth. | Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Babak Falsafi, James C. Hoe, Andreas Nowatzyk |
| 2004 | DAC | Multiple constant multiplication by time-multiplexed mapping of addition chains. | Peter Tummeltshammer, James C. Hoe, Markus Pschel |
| 2004 | FPGA | In-system FPGA prototyping of an itanium microarchitecture. | Roland E. Wunderlich, James C. Hoe |
| 2004 | ICASSP | Automatic cost minimization for multiplierless implementations of discrete signal transforms. | Adam C. Zelinski, Markus Pschel, Smarahara Misra, James C. Hoe |
| 2004 | ICCAD | Custom-optimized multiplierless implementations of DSP algorithms. | Markus Pschel, Adam C. Zelinski, James C. Hoe |
| 2004 | ICCD | In-System FPGA Prototyping of an Itanium Microarchitecture. | Roland E. Wunderlich, James C. Hoe |
| 2004 | MEMOCODE | Synchronous extensions to operation centric hardware description languages. | Grace Nordin, James C. Hoe |
| 2004 | MICRO | Efficient Resource Sharing in Concurrent Error Detecting Superscalar Microarchitectures. | Jared C. Smolens, Jangwoo Kim, James C. Hoe, Babak Falsafi |
| 2003 | FPGA | High-level modeling and FPGA prototyping of microprocessors. | Joydeep Ray, James C. Hoe |
| 2003 | ISCA | SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling. | Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, James C. Hoe |
| 2003 | WCAE | Superscalar out-of-order demystified in four instructions. | James C. Hoe |
| 2001 | MICRO | Dual use of superscalar datapath for transient-fault detection and recovery. | Joydeep Ray, James C. Hoe, Babak Falsafi |
| 2000 | ICCAD | Synthesis of Operation-Centric Hardware Descriptions. | James C. Hoe, Arvind |
| 1999 | SC | A Personal Supercomputer for Climate Research. | James C. Hoe, Chris Hill, Alistair Adcroft |
| 1998 | SC | MPI-StarT: Delivering Network Performance to Numerical Applications. | Parry Husbands, James C. Hoe |
| 1995 | EuroPar | START-NG: Delivering Seamless Parallel Computing. | Derek Chiou, Boon Seong Ang, Robert Greiner, Arvind, James C. Hoe, Michael J. Beckerle, James E. Hicks, G. Andrew Boughton |
| 1994 | HOTI | Network substrate for parallel processing on a workstation cluster. | James C. Hoe, Andy Boughton |