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James D. Warnock

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

6

Active years

1997–2018

Best venue rank

A*

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2018VLSIDImpact of Device Aging on Early Mode Failures in Pulsed Latches.Ankur Shukla, Rahul M. Rao, James D. Warnock
2016DATEDesign-synthesis co-optimisation using skewed and tapered gates.Ayan Datta, James D. Warnock, Ankur Shukla, Saurabh Gupta, Yiu H. Chan, Karthik Mohan, Charudhattan Nagarajan
2011DACDesign, CAD and technology challenges for future processors: 3D perspectives.Jeff Burns, Gary Carpenter, Eren Kursun, Ruchir Puri, James D. Warnock, Michael Scheuermann
2011DACCircuit design challenges at the 14nm technology node.James D. Warnock
2009ICCADAn elegant hardware-corroborated statistical repair and test methodology for conquering aging effects.Rouwaida Kanj, Rajiv V. Joshi, Chad Adams, James D. Warnock, Sani R. Nassif
2006ASPDACKey features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor.Dac C. Pham, Hans-Werner Anderson, Erwin Behnen, Mark Bolliger, Sanjay Gupta, H. Peter Hofstee, Paul E. Harvey, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Sang Lee, Tuyen V. Nguyen, John G. Petrovick, Mydung Pham, Juergen Pille, Stephen D. Posluszny, Mack W. Riley, Joseph Verock, James D. Warnock, Steve Weitzel, Dieter F. Wendel
1997ICCDHigh-Performance CMOS Circuit Techniques for the G-4 S/390 Microprocessor.James D. Warnock, Leon J. Sigal, Brian W. Curran, Yuen H. Chan