James W. Tschanz

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

Venues

Active years

2001–2020

Best venue rank

Where they publish

Papers

23 indexed papers, newest first.

Year	Venue	Title	Authors
2020	ISCAS	A Quad-Output Elastic Switched Capacitor Converter and Per-Core LDO with 87% Power Efficiency and 2.5 Core-Frequency Range Improvement.	Samantak Gangopadhyay, James W. Tschanz, Arijit Raychowdhury
2015	ISCAS	Error-energy analysis of hardware logarithmic approximation methods for low power applications.	Alicia Klinefelter, Joseph F. Ryan, James W. Tschanz, Benton H. Calhoun
2014	ASPDAC	Resiliency for many-core system on a chip.	Tanay Karnik, James W. Tschanz, Nitin Borkar, Jason Howard, Sriram R. Vangal, Vivek De, Shekhar Borkar
2012	DATE	Design for test and reliability in ultimate CMOS.	Michael Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh, Yervant Zorian, Tanay Karnik, Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Carlos Tokunaga, Arijit Raychowdhury, Muhammad M. Khellah, Jaydeep P. Kulkarni, Vivek De, Dimiter Avresky
2010	ASPDAC	Resilient design in scaled CMOS for energy efficiency.	James W. Tschanz, Keith A. Bowman, Muhammad M. Khellah, Chris Wilkerson, Bibiche M. Geuskens, Dinesh Somasekhar, Arijit Raychowdhury, Jaydeep P. Kulkarni, Carlos Tokunaga, Shih-Lien Lu, Tanay Karnik, Vivek De
2010	ICCAD	Resilient microprocessor design for improving performance and energy efficiency.	Keith A. Bowman, James W. Tschanz
2010	ISLPED	Resilient microprocessor design for high performance & energy efficiency.	Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De
2009	DAC	Circuit techniques for dynamic variation tolerance.	Keith A. Bowman, James W. Tschanz, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek De, Shekhar Y. Borkar
2009	ICCAD	Resilient circuits - Enabling energy-efficient performance and reliability.	James W. Tschanz, Keith A. Bowman, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik
2008	ICCAD	Reliable system design: models, metrics and design techniques.	Subhasish Mitra, Ravishankar K. Iyer, Kishor S. Trivedi, James W. Tschanz
2007	DAC	Comparative Analysis of Conventional and Statistical Design Techniques.	Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James W. Tschanz, Vivek De
2007	IOLTS	Design for Resilience to Soft Errors and Variations.	Ming Zhang, T. M. Mak, James W. Tschanz, Kee Sup Kim, Norbert Seifert, Davia Lu
2006	ISLPED	Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance.	Keith A. Bowman, James W. Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De
2006	VTS	Session Abstract.	James W. Tschanz
2005	DAC	Variation-tolerant circuits: circuit solutions and techniques.	James W. Tschanz, Keith A. Bowman, Vivek De
2005	ICCAD	Serial-link bus: a low-power on-chip bus architecture.	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James W. Tschanz, Vivek De
2005	ICCD	A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors.	Muhammad M. Khellah, Maged Ghoneima, James W. Tschanz, Yibin Ye, Nasser A. Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail
2005	ISCAS	Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses.	Yehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James W. Tschanz, Yibin Ye, Vivek De
2005	ISCAS	Adaptive circuit techniques to minimize variation impacts on microprocessor performance and power.	James W. Tschanz, Siva G. Narendra, Ali Keshavarzi, Vivek De
2004	VLSID	Design Challenges in Sub-100nm High Performance Microprocessors.	Siva G. Narendra, Vasantha Erraguntla, James W. Tschanz, Nitin Borkar
2003	DAC	Parameter variations and impact on circuits and microarchitecture.	Shekhar Borkar, Tanay Karnik, Siva G. Narendra, James W. Tschanz, Ali Keshavarzi, Vivek De
2002	DAC	Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors.	Tanay Karnik, Yibin Ye, James W. Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar
2001	ISLPED	Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors.	James W. Tschanz, Siva G. Narendra, Zhanping Chen, Shekhar Borkar, Manoj Sachdev, Vivek De