Jitendra Khare
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
18
Venues
6
Active years
1993–2006
Best venue rank
A*
Where they publish
Papers
18 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | ITC | Embedded Memory Field Returns - Trials and Tribulations. | Jitendra Khare, Amit B. Shah, Ashok Raman, Girish Rayas |
| 2004 | ITC | Test Strategies For a 40Gbps Framer SoC. | Hans T. Heineken, Jitendra Khare |
| 2004 | ITC | Memory Yield Improvement - SoC Design Perspective. | Jitendra Khare |
| 2003 | ITC | DFM - A Fabless Perspective. | Jitendra Khare |
| 2001 | ITC | Test response compression and bitmap encoding for embedded memories in manufacturing process monitoring. | John T. Chen, Jitendra Khare, Ken Walker, Saghir A. Shaikh, Janusz Rajski, Wojciech Maly |
| 2001 | VTS | Enabling Embedded Memory Diagnosis via Test Response Compression. | John T. Chen, Wojciech Maly, Janusz Rajski, Omar Kebichi, Jitendra Khare |
| 2000 | VLSID | Cost Trade-Offs in System On Chip Designs. | Jitendra Khare, Hans T. Heineken, Manuel d'Abreu |
| 2000 | VLSID | Maximizing Wafer Productivity Through Layout Optimization. | Charles H. Ouyang, Hans T. Heineken, Jitendra Khare, Saghir A. Shaikh, Manuel d'Abreu |
| 2000 | VLSID | Manufacturability and Testability Oriented Synthesis. | Saghir A. Shaikh, Jitendra Khare, Hans T. Heineken |
| 2000 | VTS | Test and Debug of Networking SoCs: A Case Study. | A. Bommireddy, Jitendra Khare, Saghir A. Shaikh, S.-T. Su |
| 1998 | DATE | Design-Manufacturing Interface: Part I - Vision. | Wojciech Maly, Pranab K. Nag, Hans T. Heineken, Jitendra Khare |
| 1998 | DATE | Design-Manufacturing Interface: Part II - Applications. | Wojciech Maly, Pranab K. Nag, Charles H. Ouyang, Hans T. Heineken, Jitendra Khare, P. Simon |
| 1997 | DAC | CAD at the Design-Manufacturing Interface. | Hans T. Heineken, Jitendra Khare, Wojciech Maly, Pranab K. Nag, Charles H. Ouyang, Witold A. Pleskacz |
| 1996 | ICCAD | Design for manufacturability in submicron domain. | Wojciech Maly, Hans T. Heineken, Jitendra Khare, Pranab K. Nag |
| 1996 | VTS | Fault characterization of standard cell libraries using inductive contamination. | Jitendra Khare, Wojciech Maly, Nathan Tiday |
| 1995 | ITC | Inductive Contamination Analysis (ICA) with SRAM Application. | Jitendra Khare, Wojciech Maly |
| 1995 | VLSID | Testability-oriented channel routing. | Jitendra Khare, Sujoy Mitra, Pranab K. Nag, U. Maly, Rob A. Rutenbar |
| 1993 | VTS | Estimation of reject ratio in testing of combinatorial circuits. | Dinesh D. Gaitonde, Jitendra Khare, D. M. H. Walker, Wojciech P. Maly |