Jos A. Tierno
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
1997–2012
Best venue rank
A*
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | FPGA | A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation. | Sameh W. Asaad, Ralph Bellofatto, Bernard Brezzo, Chuck Haymes, Mohit Kapur, Benjamin D. Parker, Thomas Roewer, Proshanta Saha, Todd Takken, Jos A. Tierno |
| 2011 | MICRO | Active management of timing guardband to save energy in POWER7. | Charles Lefurgy, Alan J. Drake, Michael S. Floyd, Malcolm Allen-Ware, Bishop Brock, Jos A. Tierno, John B. Carter |
| 1997 | ICCD | Asynchronous Transpose-Matrix Architectures. | Jos A. Tierno, Prabhakar Kudva |