| 2005 | DSD | A processor for testing mixed-signal cores in System-on-Chip. | Francisco Duarte, Jos Machado da Silva, Jos Carlos Alves, G. A. Pinho, Jos Silva Matos |
| 2004 | FPL | A Development Support System for Applications That Use Dynamically Reconfigurable Hardware. | Joo Canas Ferreira, Jos Silva Matos |
| 2000 | DATE | Mixed-Signal BIST Using Correlation and Reconfigurable Hardware. | Jos Machado da Silva, J. Soeiro Duarte, Jos Silva Matos |
| 1999 | FCCM | FAFNER-Accelerating Nesting Problems with FPGAs. | Jos Carlos Alves, Joo Canas Ferreira, C. Albuquerque, Jos Fernando Oliveira, Jos Soeiro Ferreira, Jos Silva Matos |
| 1998 | FCCM | RVC - A Reconfigurable Coprocessor for Vector Processing Applications. | Jos Carlos Alves, Jos Silva Matos |
| 1998 | FCCM | A Prototype System for Rapid Application Development using Dynamically Reconfigurable Hardware. | Joo Canas Ferreira, Jos Silva Matos |
| 1997 | ICASSP | A vector architecture for higher-order moments estimation. | Jos Carlos Alves, Andr T. Puga, Lus Corte-Real, Jos Silva Matos |
| 1997 | ITC | Implementation of Mixed Current/Voltage Testing Using the IEEE P1149.4 Infrastructure. | Jos Machado da Silva, Ana C. Leo, Jos Silva Matos, Jos Carlos Alves |
| 1996 | DATE | Evaluation of iDD/vOUT Cross-Correlation for Mixed Current/Voltage Testing of Analogue and Mixed-Signal Circuits. | Jos Machado da Silva, Jos Silva Matos |
| 1994 | ISCAS | An Approach to Testability Improvement of Mixed-Signal Boards. | Jos Silva Matos, Joo Canas Ferreira, Ana C. Leo, Jos Machado da Silva |
| 1994 | VTS | Architecture of test support ICs for mixed-signal testing. | Jos Silva Matos, Joo Canas Ferreira, Ana C. Leo, Jos Machado da Silva |
| 1993 | ITC | Control and Observation of Analog Nodes in Mixed-Signal Boards. | Jos Silva Matos, Ana C. Leo, Joo Canas Ferreira |
| 1992 | ITC | A Boundary Scan Test Controller for Hierarchical BIST. | Jos M. M. Ferreira, Filipe S. Pinto, Jos Silva Matos |