Ju-Yueh Lee
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
6
Active years
2006–2011
Best venue rank
A
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | FPGA | Fault modeling and characteristics of SRAM-based FPGAs (abstract only). | Naifeng Jing, Ju-Yueh Lee, Chun Zhang, Jiarong Tong, Zhigang Mao, Lei He |
| 2011 | FPL | Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms. | Naifeng Jing, Ju-Yueh Lee, Zhe Feng, Weifeng He, Zhigang Mao, Shi-Jie Wen, Rick Wong, Lei He |
| 2011 | ICCAD | Mitigating FPGA interconnect soft errors by in-place LUT inversion. | Naifeng Jing, Ju-Yueh Lee, Weifeng He, Zhigang Mao, Lei He |
| 2010 | ASPDAC | Fault-tolerant resynthesis with dual-output LUTs. | Ju-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He, Minming Li |
| 2010 | DATE | RALF: Reliability Analysis for Logic Faults - An exact algorithm and its applications. | Samuel B. Luckenbill, Ju-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He |
| 2010 | ICCAD | In-place decomposition for robustness in FPGA. | Ju-Yueh Lee, Zhe Feng, Lei He |
| 2006 | ISCAS | Low power scheduling method using multiple supply voltages. | Kun-Lin Tsai, Ju-Yueh Lee, Shanq-Jang Ruan, Feipei Lai |