Juan J. Rodrguez-Andina
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
32
Venues
7
Active years
1994–2025
Best venue rank
C
Where they publish
Papers
32 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | INDIN | Quality-Efficiency Driven Co-Optimization of Scheduling and Process in SMT Assembly. | Zhengkai Li, Hao Sun, Xinghu Yu, Tong Wang, Zhihong Zhao, Qin Zhao, Huijun Gao, Juan J. Rodrguez-Andina |
| 2025 | IECON | Optimal Distance Does Not Mean Optimal Time in PCB Assembly Optimization. | Zhengkai Li, Hao Sun, Xinghu Yu, Tong Wang, Zhihong Zhao, Qin Zhao, Juan J. Rodrguez-Andina, Jianbin Qiu, Huijun Gao |
| 2025 | IECON | From PyTorch to CUDA and TensorRT: Optimizing the Deployment of EfficientAD for Real-Time Visual Anomaly Detection. | Andrea Quintns-Fernndez, Roberto Fernndez Molanes, Carlos Gonzlez-Val, Juan J. Rodrguez-Andina, Jos Faria |
| 2022 | IECON | Optimized Implementation of Segmentation CNNs in GPU SoC Devices. | Elena Rodrguez Lois, Roberto Fernndez Molanes, Carlos Gonzlez-Val, Juan J. Rodrguez-Andina, Jos Faria |
| 2020 | IECON | Performance Evaluation of State-of-the-Art Edge Computing Devices for DNN Inference. | Xalo Rancao, Roberto Fernndez Molanes, Carlos Gonzlez-Val, Juan J. Rodrguez-Andina, Jos Faria |
| 2019 | IECON | Multivariable Non-Linear UGV Controller Design Using Deep Reinforcement Learning. | Javier Grando Gonzlez, Roberto Fernndez Molanes, Juan J. Rodrguez-Andina, Jos Faria |
| 2019 | IECON | Online Calculation of Melt Pool Cooling Rate with Automatic Background Correction. | Elena Rodrguez Lois, Roberto Fernndez Molanes, Carlos Gonzlez-Val, Juan J. Rodrguez-Andina, Jos Faria |
| 2018 | IECON | 100fps Camera-Based UGV Localization System Using Cyclone V FPSoC. | Alexandre Muniz Garcia, Roberto Fernandez Molanes, Juan J. Rodrguez-Andina, Jos Faria |
| 2018 | IECON | Efficient PPG Signal Acquisition for Atrial Fibrillation Screening with Wearable Devices. | Daniel Rivera, Diego Castineira, Csar Veiga, Juan J. Rodrguez-Andina, Jos Faria, Enrique Garca |
| 2017 | IECON | Real-time monitoring of poultry activity in breeding farms. | Carlos Gonzlez-Val, Ricardo Pardo, Jos Faria, Mara Dolores Valds, Juan J. Rodrguez-Andina, Manuel Portela |
| 2017 | IECON | UviSpace - A multidisciplinary PBL system based on mobile robots. | Javier Lpez-Randulfe, Juan J. Rodrguez-Andina, Jos Faria |
| 2017 | IECON | Measurement of air flow in newborn poultry transportation systems. | Ricardo Pardo, Carlos Gonzlez-Val, Jos Faria, Mara Dolores Valds, Juan J. Rodrguez-Andina, Manuel Portela |
| 2015 | INDIN | ROS-based 3D on-line monitoring of LMD robotized cells. | Jorge Rodrguez-Arajo, Juan J. Rodrguez-Andina |
| 2015 | IECON | Characterization of FPGA-master ARM communication delays in Cyclone V devices. | Roberto Fernandez Molanes, Filipe Salgado, Jos Faria, Juan J. Rodrguez-Andina |
| 2013 | FPL | Aging monitoring with local sensors in FPGA-based designs. | Carlos Leong, Jorge Semio, Isabel C. Teixeira, Marcelino B. Santos, Joo Paulo Teixeira, Mara Dolores Valds, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas |
| 2013 | IECON | Industrial electronic control: FPGAs and embedded systems solutions. | Lus Gomes, Eric Monmasson, Marcian N. Cirstea, Juan J. Rodrguez-Andina |
| 2013 | IECON | Field-Programmable System-on-Chip for high-accuracy frequency measurements in QCM sensors. | Roberto Fernandez Molanes, Jos Faria, Juan J. Rodrguez-Andina |
| 2012 | IECON | FPGA-based laser cladding system with increased robustness to optical defects. | Jorge Rodrguez-Arajo, Juan J. Rodrguez-Andina, Jos Faria, Flix Vidal, Jose Luis Mato, Ma Angeles Montealegre |
| 2011 | FPL | Performance Failure Prediction Using Built-In Delay Sensors in FPGAs. | Vasco Bexiga, Carlos Leong, Jorge Semio, Isabel C. Teixeira, Joo Paulo Teixeira, Mara Dolores Valds, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas |
| 2010 | IOLTS | Investigating the Use of BICS to detect resistive-open defects in SRAMs. | Raul Chipana, Letcia Maria Veiras Bolzani, Fabian Vargas, Jorge Semio, Juan J. Rodrguez-Andina, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2009 | IOLTS | Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies. | Jorge Semio, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2008 | DDECS | Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. | Jorge Semio, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2008 | IOLTS | Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits. | Jorge Semio, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2007 | DDECS | Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. | Jorge Semio, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2007 | IOLTS | On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. | Jorge Semio, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2006 | FPL | FPGA Implementation of High-Performance PHM / DPHM Schedulers. | Enrique Soto, Elena Lago, Juan J. Rodrguez-Andina |
| 2006 | IOLTS | Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes. | Marcial Jess Rodrguez-Irago, Juan J. Rodrguez-Andina, Fabian Vargas, Jorge Semio, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2005 | DSD | Characterization of Wavelet-Based Image Coding Systems for Algorithmic Fault Detection. | Luca Costas, Juan J. Rodrguez-Andina |
| 2005 | DSD | High-Level Modelling and Detection of the Faulty Behaviour of VOQ Switches under Balanced Traffic. | Miguel Pereira, Enrique Soto, Juan J. Rodrguez-Andina, Francisco J. Gonzlez-Castao |
| 2005 | IOLTS | Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test. | Marcial Jess Rodrguez-Irago, Juan J. Rodrguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2000 | ITC | Concurrent error detection in block ciphers | Santiago Fernndez-Gomez, Juan J. Rodrguez-Andina, Enrique Mandado |
| 1994 | FPL | Design of Safety Systems Using Field Programmable Gate Arrays. | Juan J. Rodrguez-Andina, Jacobo lvarez, Enrique Mandado |