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Junzhong Shen

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

28

Venues

13

Active years

2015–2026

Best venue rank

A*

Where they publish

Papers

28 indexed papers, newest first.

YearVenueTitleAuthors
2026HPCAUni-STC: Unified Sparse Tensor Core.Haocheng Lian, Qiyue Zhang, Xinran Zhao, Meichen Dong, Yijie Nie, Zhengyi Zhao, Junzhong Shen, Wei Guo, Chun Huang, Bingcai Sui, Weifeng Liu
2025DATEWinAcc: Window-based Acceleration of Neural Networks Using Block Floating Point.Xin Ju, Jun He, Mei Wen, Jing Feng, Yasong Cao, Junzhong Shen, Zhaoyun Chen, Yang Shi
2025DATESparSynergy: Unlocking Flexible and Efficient DNN Acceleration Through Multi-Level Sparsity.Jingkui Yang, Mei Wen, Junzhong Shen, Jianchao Yang, Yasong Cao, Jun He, Minjin Tang, Zhaoyun Chen, Yang Shi
2025IJCNNInitial-Key Cache: An Efficient KV Cache Strategy Focusing on Initial and Key Tokens for LLMs.Zhongyi Tang, Zejiang He, Junzhong Shen, Yiyue Hu, Luchen Zhou, Yongzhang Nie, Yongwen Wang
2025ISCASCAMO: A High-Performance CIM-based Lightweight CNN Accelerator for Mobile Devices.Xin Ju, Renyu Yang, Mei Wen, Junzhong Shen, Tianyu Wang, Zhaoyan Shen, Zili Shao, Bin Liang
2024DATEMACO: Exploring GEMM Acceleration on a Loosely-Coupled Multi-Core Processor.Bingcai Sui, Junzhong Shen, Caixia Sun, Junhui Wang, Zhong Zheng, Wei Guo
2024ICA3PPMAP-SIM: A Performance Model for Shared-Memory Heterogeneous Systems with Mapping Awareness.Yuhang Li, Mei Wen, Junzhong Shen, Zhaoyun Chen, Yang Shi
2024ICA3PPMSAMinjin Tang, Mei Wen, Junzhong Shen, Jingkui Yang, Zeyu Xue, Zili Shao
2024ISCASEnhancing the PE Utilization for Multi-Precision Systolic Array via Optimizing Computation Latency.Jing Feng, Mei Wen, Xin Ju, Junzhong Shen, Yang Guo
2024MICROHyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs.Jianchao Yang, Mei Wen, Dong Chen, Zhaoyun Chen, Zeyu Xue, Yuhang Li, Junzhong Shen, Yang Shi
2022HPCCMZ Core: An Enhanced Matrix Acceleration Engine for HPC/ AI Applications.Yasong Cao, Mei Wen, Junzhong Shen, Sheng Liu, Zhi Wang, Minjin Tang, Yahao Fang, Jianchao Yang, Renyu Yang, Yuhan Kang, Jiawei Fei
2022ICCDBP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays.Jianchao Yang, Mei Wen, Junzhong Shen, Yasong Cao, Minjin Tang, Renyu Yang, Jiawei Fei, Chunyuan Zhang
2022ICPPMentha: Enabling Sparse-Packing Computation on Systolic Arrays.Minjin Tang, Mei Wen, Yasong Cao, Junzhong Shen, Jianchao Yang, Jiawei Fei, Yang Guo, Sheng Liu
2022ISCASS-SIM: A Simulator for Systolic Array-based DNN Accelerators with Tile Access Awareness.Yuhang Li, Mei Wen, Renyu Yang, Junzhong Shen, Yasong Cao, Jianan Wang
2022ISPASSTILE-SIM: A Systematic Approach to Systolic Array-based Accelerator Evaluation.Yuhang Li, Mei Wen, Jiawei Fei, Junzhong Shen, Yasong Cao
2021HPCCEmbrace the Conflicts: Exploring the Integration of Single Port Memory in Systolic Array-based Accelerators.Renyu Yang, Junzhong Shen, Mei Wen, Yasong Cao, Yuhang Li
2021HPCCSAI: Self-Adjusting Incremental Quantile Estimation for Sparse Training of Neural Networks on Hardware Accelerators.Jianchao Yang, Mei Wen, Minjin Tang, Junzhong Shen, Chunyuan Zhang
2020DACTowards Memory-Efficient Streaming Processing with Counter-Cascading Sketching on FPGA.Minjin Tang, Mei Wen, Junzhong Shen, Xiaolei Zhao, Chunyuan Zhang
2020FPGAScalable FPGA-based Architecture for High-Performance Per-Flow Traffic Measurement.Junzhong Shen, Mei Wen, Minjin Tang, Xiaolei Zhao, Chunyuan Zhang
2020ICA3PPTowards a Deep-Pipelined Architecture for Accelerating Deep GCN on a Multi-FPGA Platform.Qixuan Cheng, Mei Wen, Junzhong Shen, Deguang Wang, Chunyuan Zhang
2019DACScale-out Acceleration for 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA System.Junzhong Shen, Deguang Wang, You Huang, Mei Wen, Chunyuan Zhang
2019FPGAAccelerating 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA System.Junzhong Shen, Deguang Wang, You Huang, Mei Wen, Chunyuan Zhang
2019ICPPAn Efficient Design Flow for Accelerating Complicated-connected CNNs on a Multi-FPGA Platform.Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang
2019ISCASTowards a Uniform Architecture for the Efficient Implementation of 2D and 3D Deconvolutional Neural Networks on FPGAs.Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang
2018FPGATowards a Uniform Template-based Architecture for Accelerating 2D and 3D CNNs on FPGA.Junzhong Shen, You Huang, Zelong Wang, Yuran Qiao, Mei Wen, Chunyuan Zhang
2018ISCASTowards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs.Junzhong Shen, Yuran Qiao, You Huang, Mei Wen, Chunyuan Zhang
2017NPCOptimizing OpenCL Implementation of Deep Convolutional Neural Network on FPGA.Yuran Qiao, Junzhong Shen, Dafei Huang, Qianming Yang, Mei Wen, Chunyuan Zhang
2015ICA3PPUnified Virtual Memory Support for Deep CNN Accelerator on SoC FPGA.Tao Xiao, Yuran Qiao, Junzhong Shen, Qianming Yang, Mei Wen