Kedar Janardan Dhori
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
2015–2022
Best venue rank
National
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | ISCAS | 3-Stage Pipelined Hierarchical SRAMs with Burst Mode Read in 65nm LSTP CMOS. | Mukesh Kumar Srivastav, Rimjhim, Roshan Mishra, Anuj Grover, Kedar Janardan Dhori, Harsh Rawat |
| 2022 | VLSID | 40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode. | Kedar Janardan Dhori, Promod Kumar, Christophe Lecocq, Pascal Urard, Olivier Callen, Florian Cacho, Maryline Parra, Prashant Pandey, Daniel Noblet |
| 2022 | VLSID | Retention Problem Free High Density 4T SRAM cell with Adaptive Body Bias in 18nm FD-SOI. | Chandan Kumar, Rahul Kumar, Anuj Grover, Shouri Chatterjee, Kedar Janardan Dhori, Harsh Rawat |
| 2016 | ISCAS | Temperature-based adaptive memory sub-system in 28nm UTBB FDSOI. | Amit Chhabra, Mudit Srivastava, Prakhar Raj Gupta, Kedar Janardan Dhori, Philippe Triolet, Thierry Di Gilio, Nitin Bansal, B. Sujatha |
| 2015 | VLSID | A CMOS 90nm 50Mhz Supply Noise Tolerant High Density 8T-NAND ROM. | Kedar Janardan Dhori, Vinay Kumar, Ashish Kumar |