| 2022 | GLOBECOM | Joint Estimation of Vehicle's Position and Velocity With Distributed RSUs for OFDM Radar System. | Seong-Hwan Hyun, Jihye Kim, Keunwoo Kim, Wanjei Cho, Seong-Cheol Kim |
| 2021 | HCI | Hurdle Relay: A Participatory Design Method for Understanding the Information Gap Through Iterative Comparison. | Keunwoo Kim, Seoyeon Jang, Hyeon-Ju Park, Kyung Je Jo, Hankyung Kim, Youn-Kyung Lim |
| 2010 | VLSID | FinFET SRAM Design. | Rajiv V. Joshi, Keunwoo Kim, Rouwaida Kanj |
| 2009 | ICCAD | Yield estimation of SRAM circuits using "Virtual SRAM Fab". | Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das |
| 2008 | VLSID | Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies. | Aditya Bansal, Jae-Joon Kim, Keunwoo Kim, Saibal Mukhopadhyay, Ching-Te Chuang, Kaushik Roy |
| 2007 | ISLPED | A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies. | Rajiv V. Joshi, Rouwaida Kanj, Keunwoo Kim, Richard Q. Williams, Ching-Te Chuang |
| 2007 | ISLPED | Design and analysis of Thin-BOX FD/SOI devices for low-power and stable SRAM in sub-50nm technologies. | Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang |
| 2007 | VLSID | A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology. | Rajiv V. Joshi, Keunwoo Kim, Richard Q. Williams, Edward J. Nowak, Ching-Te Chuang |
| 2005 | ISLPED | Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits. | Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang, Kaushik Roy |
| 2004 | ISLPED | Nanoscale CMOS circuit leakage power reduction by double-gate device. | Keunwoo Kim, Koushik K. Das, Rajiv V. Joshi, Ching-Te Chuang |
| 2003 | ISLPED | Strained-si devices and circuits for low-power applications. | Keunwoo Kim, Rajiv V. Joshi, Ching-Te Chuang |