| 2019 | IOLTS | Identification of Failure Modes for Circuit Samples with Confounded Causes of Failure. | Shu-Han Hsu, Ying-Yuan Huang, Kexin Yang, Linda Milor |
| 2018 | VTS | Circuit-level reliability simulator for front-end-of-line and middle-of-line time-dependent dielectric breakdown in FinFET technology. | Kexin Yang, Taizhi Liu, Rui Zhang, Linda Milor |
| 2017 | IOLTS | On-line monitoring of system health using on-chip SRAMs as a wearout sensor. | Woongrae Kim, Taizhi Liu, Linda Milor |
| 2017 | VTS | A methodology for estimating memory lifetime using a system-level accelerated life test and error-correcting codes. | Dae-Hyun Kim, Linda Milor |
| 2015 | VTS | MBIST and statistical hypothesis test for time dependent dielectric breakdowns due to GOBD vs. BTDDB in an SRAM array. | Woongrae Kim, Chang-Chih Chen, Soonyoung Cha, Linda Milor |
| 2015 | VTS | Panel: Analog/RF BIST: Are we there yet? | Sule Ozev, Linda Milor |
| 2014 | VTS | Built-in self test methodology for diagnosis of backend wearout mechanisms in SRAM cells. | Woongrae Kim, Linda Milor |
| 2013 | DATE | System-level modeling and microprocessor reliability analysis for backend wearout mechanisms. | Chang-Chih Chen, Linda Milor |
| 2012 | ETS | Impact of NBTI on analog components. | Zhengliang Lv, Linda Milor, Shiyuan Yang |
| 2012 | ICCD | A comparative study of wearout mechanisms in state-of-art microprocessors. | Chang-Chih Chen, Fahad Ahmed, Linda Milor |
| 2010 | VTS | Reliable cache design with on-chip monitoring of NBTI degradation in SRAM cells using BIST. | Fahad Ahmed, Linda Milor |
| 2000 | ICCAD | Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits. | Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu |
| 1990 | ICCAD | Computing Parametric Yield Accurately and Efficiently. | Linda Milor, Alberto L. Sangiovanni-Vincentelli |
| 1990 | ICCAD | Optimal Test Set Design for Analog Circuits. | Linda Milor, Alberto L. Sangiovanni-Vincentelli |