Luca Gallo
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
2013–2015
Best venue rank
A
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | DATE | Interplay of loop unrolling and multidimensional memory partitioning in HLS. | Alessandro Cilardo, Luca Gallo |
| 2014 | DATE | Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems. | Alessandro Cilardo, Edoardo Fusella, Luca Gallo, Antonino Mazzeo |
| 2014 | DSD | Generating On-Chip Heterogeneous Systems from High-Level Parallel Code. | Alessandro Cilardo, Luca Gallo |
| 2014 | FPL | Area implications of memory partitioning for high-level synthesis on FPGAs. | Luca Gallo, Alessandro Cilardo, David B. Thomas, Samuel Bayliss, George A. Constantinides |
| 2013 | DATE | Efficient and scalable OpenMP-based system-level design. | Alessandro Cilardo, Luca Gallo, Antonino Mazzeo, Nicola Mazzocca |
| 2013 | FPL | Automated synthesis of FPGA-based heterogeneous interconnect topologies. | Alessandro Cilardo, Edoardo Fusella, Luca Gallo, Antonino Mazzeo |