Luz Balado
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
5
Active years
2002–2014
Best venue rank
B
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | ETS | M-S specification binning based on digitally coded indirect measurements. | lvaro Gmez-Pau, Luz Balado, Joan Figueras |
| 2013 | ETS | M-S test based on specification validation using octrees in the measure space. | lvaro Gmez-Pau, Luz Balado, Joan Figueras |
| 2010 | DATE | Analog circuit test based on a digital signature. | Alvaro Gmez, Ricard Sanahuja, Luz Balado, Joan Figueras |
| 2006 | DDECS | Lissajous Based Mixed-Signal Testing for N-Observable Signals. | Luz Balado, Emili Lupon, L. Garca, Rosa Rodrguez-Montas, Joan Figueras |
| 2004 | VTS | BIST Technique by Equally Spaced Test Vector Sequences. | Salvador Manich, L. Garca, Luz Balado, Emili Lupon, Josep Rius, Rosa Rodrguez-Montas, Joan Figueras |
| 2003 | ETS | On the selection of efficient arithmetic additive test pattern generators [logic test]. | Salvador Manich, L. Garca, Luz Balado, Emili Lupon, Josep Rius, Rosa Rodrguez-Montas, Joan Figueras |
| 2002 | IOLTS | Analog Switches in Programmable Analog Devices: Quiescent Defective Behaviours. | Rosa Rodrguez-Montas, D. Muoz, Luz Balado, Joan Figueras |