Mahmut Yilmaz
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
18
Venues
6
Active years
2006–2024
Best venue rank
A*
Where they publish
Papers
18 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | ITC | A Scalable & Cost Efficient Next-Gen Scan Architecture: Streaming Scan Test via NVIDIA MATHS. | Kunal Jain Mangilal, Mahmut Yilmaz, Vishal Agarwal, Shantanu Sarangi, Kaushik Narayanun |
| 2022 | VTS | On-Die Noise Measurement During Automatic Test Equipment (ATE) Testing and In-System-Test (IST). | Seyed Nima Mozaffari, Bonita Bhaskaran, Shantanu Sarangi, Suhas M. Satheesh, Kuo Lin Fu, Nithin Valentine, P. Manikandan, Mahmut Yilmaz |
| 2022 | VTS | NVIDIA MATHS: Mechanism to Access Test-Data over High-Speed Links. | Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Kaushik Narayanun, Shantanu Sarangi, Francisco Da Silva, Joe Sarmiento, Smbat Tonoyan, Ashwin Chintaluri, Animesh Khare, Milind Sonawane, Ashish Kumar, Anitha Kalva, Alex Hsu, Jayesh Pandey |
| 2019 | VTS | Special Session: In-System-Test (IST) Architecture for NVIDIA Drive-AGX Platforms. | Pavan Kumar Datla Jagannadha, Mahmut Yilmaz, Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Bonita Bhaskaran, Shashank Bajpai, Venkat Abilash Reddy Nerallapally, Jayesh Pandey, Sam Jiang |
| 2016 | ITC | Advanced test methodology for complex SoCs. | Pavan Kumar Datla Jagannadha, Mahmut Yilmaz, Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Bonita Bhaskaran, Ayub Abdollahian |
| 2016 | VTS | Flexible scan interface architecture for complex SoCs. | Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Amit Sanghani, Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Jonathon E. Colburn |
| 2016 | VTS | Dynamic docking architecture for concurrent testing and peak power reduction. | Milind Sonawane, Pavan Kumar Datla Jagannadha, Sailendra Chadalavada, Shantanu Sarangi, Mahmut Yilmaz, Amit Sanghani, Karthikeyan Natarajan, Jonathon E. Colburn, Anubhav Sinha |
| 2011 | ETS | Critical Fault-Based Pattern Generation for Screening SDDs. | Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, LeRoy Winemberg, Mohammad Tehranipoor |
| 2010 | DATE | High-quality pattern selection for screening small-delay defects considering process variations and crosstalk. | Ke Peng, Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty |
| 2010 | ITC | RT-level design-for-testability and expansion of functional test sequences for enhanced defect coverage. | Alodeep Sanyal, Krishnendu Chakrabarty, Mahmut Yilmaz, Hideo Fujiwara |
| 2010 | ITC | The scan-DFT features of AMD's next-generation microprocessor core. | Mahmut Yilmaz, Baosheng Wang, Jayalakshmi Rajaraman, Tom Olsen, Kanwaldeep Sobti, Dwight Elvey, Jeff Fitzgerald, Grady Giles, Wei-Yu Chen |
| 2010 | VTS | A novel hybrid method for SDD pattern grading and selection. | Ke Peng, Jason Thibodeau, Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor |
| 2009 | DATE | Seed selection in LFSR-reseeding-based test compression for the detection of small-delay defects. | Mahmut Yilmaz, Krishnendu Chakrabarty |
| 2008 | ITC | Interconnect-Aware and Layout-Oriented Test-Pattern Selection for Small-Delay Defects. | Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor |
| 2008 | VTS | Test-Pattern Grading and Pattern Selection for Small-Delay Defects. | Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor |
| 2007 | ICCD | Low-cost run-time diagnosis of hard delay faults in the functional units of a microprocessor. | Sule Ozev, Daniel J. Sorin, Mahmut Yilmaz |
| 2006 | ITC | Self-Checking and Self-Diagnosing 32-bit Microprocessor Multiplier. | Mahmut Yilmaz, Derek Hower, Sule Ozev, Daniel J. Sorin |
| 2006 | SIGMETRICS | Applying architectural vulnerability Analysis to hard faults in the microprocessor. | Fred A. Bower, Derek Hower, Mahmut Yilmaz, Daniel J. Sorin, Sule Ozev |