Mango Chia-Tso Chao
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
43
Venues
7
Active years
1999–2026
Best venue rank
A*
Where they publish
Papers
43 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | VTS | Defect-based Testing for SRAM Address Decoders. | Ho-Jie Hsu, Hsien-Chen Lee, Chun-Yu Shen, Po-Tsang Huang, Shih-Chieh Lin, Yung-Jheng Wang, Ying-Yen Chen, Chien-Yuan Pao, Hung-Yu Lee, Mango Chia-Tso Chao |
| 2025 | ICCAD | COPA: A Congestion-Oriented Pin Assignment Framework for Intra-Block Physical Design Optimization. | Shu-Yi Tsai, Yu-Guang Chen, Kun-Min Chen, Sheng-Bing Ke, Chung-Hui Hsieh, Chih-Wei Lin, Mango Chia-Tso Chao |
| 2025 | VTS | Test Methodology for Detecting Defect-Based Hold-Time Faults. | Cheng-Hsiang Tsai, Yu-Teng Nien, Guan-You Chen, Mango Chia-Tso Chao |
| 2024 | ITC | Wafer-View Defect-Pattern-Prominent GDBN Method Using MetaFormer Variant. | Shu-Wen Li, Chia-Heng Yen, Shuo-Wen Chang, Ying-Hua Chu, Kai-Chiang Wu, Mango Chia-Tso Chao |
| 2024 | VTS | Transformer and Its Variants for Identifying Good Dice in Bad Neighborhoods. | Cheng-Che Lu, Chi-Chih Chang, Chia-Heng Yen, Shuo-Wen Chang, Ying-Hua Chu, Kai-Chiang Wu, Mango Chia-Tso Chao |
| 2023 | ITC | Enhancing Good-Die-in-Bad-Neighborhood Methodology with Wafer-Level Defect Pattern Information. | Ching-Min Liu, Chia-Heng Yen, Shu-Wen Lee, Kai-Chiang Wu, Mango Chia-Tso Chao |
| 2023 | VTS | Outlier Detection for Analog Tests Using Deep Learning Techniques. | Chin-Kuan Lin, Cheng-Che Lu, Shuo-Wen Chang, Ying-Hua Chu, Kai-Chiang Wu, Mango Chia-Tso Chao |
| 2021 | VTS | Identifying Good-Dice-in-Bad-Neighborhoods Using Artificial Neural Networks. | Cheng-Hao Yang, Chia-Heng Yen, Ting-Rui Wang, Chun-Teng Chen, Mason Chern, Ying-Yen Chen, Jih-Nung Lee, Shu-Yi Kao, Kai-Chiang Wu, Mango Chia-Tso Chao |
| 2020 | VTS | CNN-based Stochastic Regression for IDDQ Outlier Identification. | Chun-Teng Chen, Chia-Heng Yen, Cheng-Yen Wen, Cheng-Hao Yang, Kai-Chiang Wu, Mason Chern, Ying-Yen Chen, Chun-Yi Kuo, Jih-Nung Lee, Shu-Yi Kao, Mango Chia-Tso Chao |
| 2019 | ITC | Methodology of Generating Timing-Slack-Based Cell-Aware Tests. | Yu-Teng Nien, Kai-Chiang Wu, Dong-Zhen Lee, Ying-Yen Chen, Po-Lin Chen, Mason Chern, Jih-Nung Lee, Shu-Yi Kao, Mango Chia-Tso Chao |
| 2017 | VTS | Fast WAT test structure for measuring Vt variance based on latch-based comparators. | Kao-Chi Lee, Kai-Chiang Wu, Chih-Ying Tsai, Mango Chia-Tso Chao |
| 2015 | ITC | Testing methods for quaternary content addressable memory using charge-sharing sensing scheme. | Hao-Yu Yang, Rei-Fu Huang, Chin-Lung Su, Kuan-Hong Lin, Hang-Kaung Shu, Chi-Wei Peng, Mango Chia-Tso Chao |
| 2015 | VTS | Statistical techniques for predicting system-level failure using stress-test data. | Harry H. Chen, Shih-Hua Kuo, Jonathan Tung, Mango Chia-Tso Chao |
| 2015 | VTS | Random pattern generation for post-silicon validation of DDR3 SDRAM. | Hao-Yu Yang, Shih-Hua Kuo, Tzu-Hsuan Huang, Chi-Hung Chen, Chris Lin, Mango Chia-Tso Chao |
| 2014 | VTS | Testing methods for a write-assist disturbance-free dual-port SRAM. | Hao-Yu Yang, Chen-Wei Lin, Chao-Ying Huang, Ching-Ho Lu, Chen-An Lai, Mango Chia-Tso Chao, Rei-Fu Huang |
| 2013 | VTS | Testing retention flip-flops in power-gated designs. | Hao-Wen Hsu, Shih-Hua Kuo, Wen-Hsiang Chang, Shi-Hao Chen, Ming-Tung Chang, Mango Chia-Tso Chao |
| 2013 | VTS | Investigation of gate oxide short in FinFETs and the test methods for FinFET SRAMs. | Chen-Wei Lin, Mango Chia-Tso Chao, Chih-Chieh Hsu |
| 2013 | VTS | Testing of a low-VMIN data-aware dynamic-supply 8T SRAM. | Chen-Wei Lin, Chin-Yuan Huang, Mango Chia-Tso Chao |
| 2012 | ASPDAC | An Efficient Hamiltonian-cycle power-switch routing for MTCMOS designs. | Yi-Ming Wang, Shi-Hao Chen, Mango Chia-Tso Chao |
| 2012 | DAC | Alternate hammering test for application-specific DRAMs and an industrial case study. | Rei-Fu Huang, Hao-Yu Yang, Mango Chia-Tso Chao, Shih-Chin Lin |
| 2012 | ITC | Testing strategies for a 9T sub-threshold SRAM. | Hao-Yu Yang, Chen-Wei Lin, Hung-Hsin Chen, Mango Chia-Tso Chao, Ming-Hsien Tu, Shyh-Jye Jou, Ching-Te Chuang |
| 2011 | ICCAD | Detecting stability faults in sub-threshold SRAMs. | Chen-Wei Lin, Hao-Yu Yang, Chin-Yuan Huang, Hung-Hsin Chen, Mango Chia-Tso Chao |
| 2011 | ITC | Design-for-debug layout adjustment for FIB probing and circuit editing. | Kuo-An Chen, Tsung-Wei Chang, Meng-Chen Wu, Mango Chia-Tso Chao, Jing-Yang Jou, Sonair Chen |
| 2010 | ICCAD | Mathematical yield estimation for two-dimensional-redundancy memory arrays. | Mango Chia-Tso Chao, Ching-Yu Chin, Chen-Wei Lin |
| 2010 | ICCAD | Testing methods for detecting stuck-open power switches in coarse-grain MTCMOS designs. | Szu-Pang Mu, Yi-Ming Wang, Hao-Yu Yang, Mango Chia-Tso Chao, Shi-Hao Chen, Chih-Mou Tseng, Tsung-Ying Tsai |
| 2010 | ITC | Fault models and test methods for subthreshold SRAMs. | Chen-Wei Lin, Hung-Hsin Chen, Hao-Yu Yang, Mango Chia-Tso Chao, Rei-Fu Huang |
| 2010 | ITC | Mask versus Schematic - an enhanced design-verification flow for first silicon success. | Tseng-Chin Luo, Eric Leong, Mango Chia-Tso Chao, Philip A. Fisher, Wen-Hsiang Chang |
| 2010 | VTS | Theoretical analysis for low-power test decompression using test-slice duplication. | Szu-Pang Mu, Mango Chia-Tso Chao |
| 2009 | DAC | Fault models for embedded-DRAM macros. | Mango Chia-Tso Chao, Hao-Yu Yang, Rei-Fu Huang, Shih-Chin Lin, Ching-Yu Chin |
| 2009 | ICCAD | Power-switch routing for coarse-grain MTCMOS technologies. | Tsun-Ming Tseng, Mango Chia-Tso Chao, Chien Pang Lu, Chen Hsing Lo |
| 2009 | ITC | A novel test flow for one-time-programming applications of NROM technology. | Ching-Yu Chin, Yao-Te Tsou, Chi-Min Chang, Mango Chia-Tso Chao |
| 2009 | ITC | A novel array-based test methodology for local process variation monitoring. | Tseng-Chin Luo, Mango Chia-Tso Chao, Michael S.-Y. Wu, Kuo-Tsai Li, Chin C. Hsia, Huan-Chi Tseng, Chuen-Uan Huang, Yuan-Yao Chang, Samuel C. Pan, Konrad K.-L. Young |
| 2009 | VTS | Multiple-Fault Diagnosis Using Faulty-Region Identification. | Meng-Jai Tasi, Mango Chia-Tso Chao, Jing-Yang Jou, Meng-Chen Wu |
| 2008 | ITC | Testing Methodology of Embedded DRAMs. | Chi-Min Chang, Mango Chia-Tso Chao, Rei-Fu Huang, Ding-Yuan Chen |
| 2008 | VTS | Scan-Chain Reordering for Minimizing Scan-Shift Power Based on Non-Specified Test Cubes. | Yu-Ze Wu, Mango Chia-Tso Chao |
| 2007 | ICCAD | A hybrid scheme for compacting test responses with unknown values. | Mango Chia-Tso Chao, Kwang-Ting Cheng, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei |
| 2006 | DAC | Unknown-tolerance analysis and test-quality control for test response compaction using space compactors. | Mango Chia-Tso Chao, Kwang-Ting Cheng, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei |
| 2006 | DATE | Coverage loss by using space compactors in presence of unknown values. | Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei, Kwang-Ting Cheng |
| 2005 | ICCAD | Response shaper: a novel technique to enhance unknown tolerance for output response compaction. | Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Kwang-Ting Cheng |
| 2005 | ICCD | ChiYun Compact: A Novel Test Compaction Technique for Responses with Unknown Values. | Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Kwang-Ting Cheng |
| 2004 | DATE | Pattern Selection for Testing of Deep Sub-Micron Timing Defects. | Mango Chia-Tso Chao, Li-C. Wang, Kwang-Ting Cheng |
| 2001 | ICCD | Generic ILP-Based Approaches for Dynamically Reconfigurable FPGA Partitioning. | Guang-Ming Wu, Jai-Ming Lin, Mango Chia-Tso Chao, Yao-Wen Chang |
| 1999 | ICCAD | A clustering- and probability-based approach for time-multiplexed FPGA partitioning. | Mango Chia-Tso Chao, Guang-Ming Wu, Iris Hui-Ru Jiang, Yao-Wen Chang |