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Mario Kovac

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

12

Venues

6

Active years

1993–2019

Best venue rank

A

Where they publish

Papers

12 indexed papers, newest first.

YearVenueTitleAuthors
2019PPAMAn Area Efficient and Reusable HEVC 1D-DCT Hardware Accelerator.Mate Cobrnic, Alen Duspara, Leon Dragic, Igor Piljic, Hrvoje Mlinaric, Mario Kovac
2018DATEOnline efficient bio-medical video transcoding on MPSoCs through content-aware workload allocation.Arman Iranfar, Ali Pahlevan, Marina Zapater, Martin Zagar, Mario Kovac, David Atienza
2017DSDMANGO: Exploring Manycore Architectures for Next-GeneratiOn HPC Systems.Jos Flich, Giovanni Agosta, Philipp Ampletzer, David Atienza Alonso, Carlo Brandolese, Etienne Cappe, Alessandro Cilardo, Leon Dragic, Alexandre Dray, Alen Duspara, William Fornaciari, Gerald Guillaume, Ynse Hoornenborg, Arman Iranfar, Mario Kovac, Simone Libutti, Bruno Maitre, Jos Maria Martnez, Giuseppe Massari, Hrvoje Mlinaric, Ermis Papastefanakis, Toms Picornell, Igor Piljic, Anna Pupykina, Federico Reghenzani, Isabelle Staub, Rafael Tornero, Marina Zapater, Davide Zoni
2016DATEEnabling HPC for QoS-sensitive applications: The MANGO approach.Jos Flich, Giovanni Agosta, Philipp Ampletzer, David Atienza Alonso, Carlo Brandolese, Alessandro Cilardo, William Fornaciari, Ynse Hoornenborg, Mario Kovac, Bruno Maitre, Giuseppe Massari, Hrvoje Mlinaric, Ermis Papastefanakis, Fabrice Roudet, Rafael Tornero, Davide Zoni
2015EDUCONWork in progress: Embedded computer engineering learning platform capabilities.Martin Zagar, Nikolina Frid, Josip Knezovic, Daniel Hofman, Mario Kovac, Vlado Sruk, Hrvoje Mlinaric
2014EDUCONUnified, multiple target, computer engineering learning platform.Martin Zagar, Nikolina Frid, Josip Knezovic, Daniel Hofman, Mario Kovac, Vlado Sruk, Hrvoje Mlinaric
2014FedCSISComputer Engineering Laboratory Course: E2LP Platform Experience.Nikolina Frid, Vlado Sruk, Hrvoje Mlinaric, Mario Kovac
1998DATEUniversal Strong Encryption FPGA Core Implementation.Davor Runje, Mario Kovac
1995DATEA prototype VLSI chip architecture for JPEG image compression.Mario Kovac, N. Ranganathan, Martin Zagar
1995VLSIDJAGUAR: a high speed VLSI chip for JPEG image compression standard.Mario Kovac, N. Ranganathan
1994VLSIDACE: A VLSI Chip for Galois Field GF (2Mario Kovac, N. Ranganathan
1993VLSIDSIGMA: A VLSI Chip for Galois Field GF(2Mario Kovac, N. Ranganathan, M. Varanasi