| 2019 | DATE | Finding All DC Operating Points Using Interval Arithmetic Based Verification Algorithms. | Itrat A. Akhter, Justin Reiher, Mark R. Greenstreet |
| 2019 | FMCAD | Integrating SMT with Theorem Proving for Verification of Analog and Mixed-Signal Circuits (Invited Tutorial). | Mark R. Greenstreet |
| 2014 | FMCAD | Response property checking via distributed state space exploration. | Brad D. Bingham, Mark R. Greenstreet |
| 2013 | CAV | Distributed Explicit State Model Checking of Deadlock Freedom. | Brad D. Bingham, Jesse D. Bingham, John Erickson, Mark R. Greenstreet |
| 2013 | FMCAD | Verifying global convergence for a digital phase-locked loop. | Jijie Wei, Yan Peng, Ge Yu, Mark R. Greenstreet |
| 2012 | FMCAD | Oscillator verification with probability one. | Chao Yan, Mark R. Greenstreet |
| 2011 | FMCAD | Parameterized verification of deadlock freedom in symmetric cache coherence protocols. | Brad D. Bingham, Mark R. Greenstreet, Jesse D. Bingham |
| 2011 | ICPP | On the Energy Complexity of Parallel Algorithms. | Vijay Anand Korthikanti, Gul Agha, Mark R. Greenstreet |
| 2009 | ATVA | Verifying VLSI Circuits. | Mark R. Greenstreet |
| 2009 | FPGA | Towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in 65nm FPGAs. | Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet |
| 2008 | ASPDAC | Faster projection based methods for circuit level verification. | Chao Yan, Mark R. Greenstreet |
| 2008 | FMCAD | Verifying an Arbiter Circuit. | Chao Yan, Mark R. Greenstreet |
| 2008 | ISPA | Computation with Energy-Time Trade-Offs: Models, Algorithms and Lower-Bounds. | Brad D. Bingham, Mark R. Greenstreet |
| 2008 | ISPA | Energy Optimal Scheduling on Multiprocessors with Migration. | Brad D. Bingham, Mark R. Greenstreet |
| 2007 | DAC | Simulating Improbable Events. | Suwen Yang, Mark R. Greenstreet |
| 2007 | DATE | Computing synchronizer failure probabilities. | Suwen Yang, Mark R. Greenstreet |
| 2007 | FMCAD | Circuit Level Verification of a High-Speed Toggle. | Chao Yan, Mark R. Greenstreet |
| 2005 | DAC | A unified optimization framework for equalization filter synthesis. | Jihong Ren, Mark R. Greenstreet |
| 2005 | ICCAD | Noise margin analysis for dynamic logic circuits. | Suwen Yang, Mark R. Greenstreet |
| 2005 | ICCD | Asynchronous IC Interconnect Network Design and Implementation Using a Standard ASIC Flow. | Bradley R. Quinton, Mark R. Greenstreet, Steven J. E. Wilton |
| 2004 | ICCD | A Signal Integrity Test Bed for PCB Buses. | Jihong Ren, Mark R. Greenstreet |
| 2003 | DAC | Synthesizing optimal filters for crosstalk-cancellation for high-speed buses. | Jihong Ren, Mark R. Greenstreet |
| 1999 | TACAS | A Light-Weight Framework for Hardware Verification. | Christoph Kern, Tarik Ono-Tesfaye, Mark R. Greenstreet |
| 1996 | CAV | Verifying Safety Properties of Differential Equations. | Mark R. Greenstreet |
| 1995 | ICCD | Implementing a STARI chip. | Mark R. Greenstreet |
| 1994 | ICCD | Automatic Verification of Refinement. | Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger |