| 2025 | ISCAS | Design of a Single-Event Upset Tolerant Low-Power Double-Tail Comparator. | Ahmet Cirakoglu, Alexander Serb, Khaled Humood, Mark Zwolinski, Themis Prodromakis |
| 2018 | DATE | Cost-efficient design for modeling attacks resistant PUFs. | Mohd Syafiq Mispan, Haibo Su, Mark Zwolinski, Basel Halak |
| 2018 | DATE | Early detection of system-level anomalous behaviour using hardware performance counters. | Lai Leng Woo, Mark Zwolinski, Basel Halak |
| 2017 | FDL | Fault analysis in analog circuits through language manipulation and abstraction. | Enrico Fraccaroli, Francesco Stefanni, Franco Fummi, Mark Zwolinski |
| 2017 | FDL | Fault Analysis in Analog Circuits Through Language Manipulation and Abstraction. | Enrico Fraccaroli, Francesco Stefanni, Franco Fummi, Mark Zwolinski |
| 2017 | ISCAS | A cost-efficient delay-fault monitor. | Gaole Sai, Basel Halak, Mark Zwolinski |
| 2016 | DATE | Static Aging Analysis Using 3-Dimensional Delay Library. | Haider Abbas, Mark Zwolinski, Basel Halak |
| 2016 | DATE | NBTI Lifetime Evaluation and Extension in Instruction Caches. | Shengyu Duan, Basel Halak, Rick Wong, Mark Zwolinski |
| 2016 | DATE | Ageing Impact on a High Speed Voltage Comparator with Hysteresis. | Illani Mohd Nawi, Basel Halak, Mark Zwolinski |
| 2016 | ETS | The influence of hysteresis voltage on single event transients in a 65nm CMOS high speed comparator. | Illani Mohd Nawi, Basel Halak, Mark Zwolinski |
| 2016 | IJCNN | High accuracy implementation of Adaptive Exponential integrated and fire neuron model. | Aliasghar Makhlooghpour, Hamid Soleimani, Arash Ahmadi, Mark Zwolinski, Mehrdad Saif |
| 2016 | IOLTS | NBTI aging evaluation of PUF-based differential architectures. | Mohd Syafiq Mispan, Basel Halak, Mark Zwolinski |
| 2015 | FDL | Conservative behavioural modelling in systemc-AMS. | Sara Vinco, Michele Lora, Mark Zwolinski |
| 2015 | VLSID | CERI: Cost-Effective Routing Implementation Technique for Network-on-Chip. | Rimpy Bishnoi, Vijay Laxmi, Manoj Singh Gaur, Radi Husin Bin Ramlee, Mark Zwolinski |
| 2014 | DATE | A low-cost radiation hardened flip-flop. | Yang Lin, Mark Zwolinski, Basel Halak |
| 2014 | DATE | Efficient simulation and modelling of non-rectangular NoC topologies. | Ji Qi, Mark Zwolinski |
| 2014 | ISCAS | A cost-efficient self-checking register architecture for radiation hardened designs. | Yang Lin, Mark Zwolinski |
| 2014 | VLSID | CARM: Congestion Adaptive Routing Method for On Chip Networks. | Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Seok-Bum Ko, Mark Zwolinski |
| 2012 | IOLTS | SETTOFF: A fault tolerant flip-flop for building Cost-efficient Reliable Systems. | Yang Lin, Mark Zwolinski |
| 2011 | DATE | Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis. | Michael Merrett, Plamen Asenov, Yangang Wang, Mark Zwolinski, Dave Reid, Campbell Millar, Scott Roy, Zhenyu Liu, Stephen B. Furber, Asen Asenov |
| 2011 | ETS | Timing Vulnerability Factors of Ultra Deep-sub-micron CMOS. | Massoud Mokhtarpour Ghahroodi, Mark Zwolinski, Rick Wong, Shi-Jie Wen |
| 2011 | HPCC | Parallelizing TUNAMI-N1 Using GPGPU. | Harsh Gidra, Israrul Haque, Nitin P. Kumar, M. Sargurunathan, Manoj Singh Gaur, Vijay Laxmi, Mark Zwolinski, Virendra Singh |
| 2011 | SIN | Acceleration of packet filtering using gpgpu. | Manoj Singh Gaur, Vijay Laxmi, Lakshminarayanan V., Kamal Cahndra, Mark Zwolinski |
| 2010 | EUC | Modelling Smart Card Security Protocols in SystemC TLM. | Aisha Fouad Bushager, Mark Zwolinski |
| 2010 | ISCAS | Design metrics for RTL level estimation of delay variability due to intradie (random) variations. | Michael Merrett, Yangang Wang, Mark Zwolinski, Koushik Maharatna, Massimo Alioto |
| 2010 | ISCAS | Parallel sparse matrix solver for direct circuit simulations on FPGAs. | Tarek Nechma, Mark Zwolinski, Jeff S. Reeve |
| 2009 | DATE | Variation resilient adaptive controller for subthreshold circuits. | Biswajit Mishra, Bashir M. Al-Hashimi, Mark Zwolinski |
| 2009 | ISCAS | Analytical Transient Response and Propagation Delay Model for Nanoscale CMOS Inverter. | Yangang Wang, Mark Zwolinski |
| 2008 | CHES | Divided Backend Duplication Methodology for Balanced Dual Rail Routing. | Karthik Baddam, Mark Zwolinski |
| 2008 | DAC | Symbolic noise analysis approach to computational hardware optimization. | Arash Ahmadi, Mark Zwolinski |
| 2007 | ISCAS | Multiple-Width Bus Partitioning Approach to Datapath Synthesis. | Arash Ahmadi, Mark Zwolinski |
| 2007 | VLSID | Evaluation of Dynamic Voltage and Frequency Scaling as a Differential Power Analysis Countermeasure. | Karthik Baddam, Mark Zwolinski |
| 2006 | ETS | Dynamic Voltage Scaling Aware Delay Fault Testing. | Noohul Basheer Zain Ali, Mark Zwolinski, Bashir M. Al-Hashimi, Peter Harrod |
| 2005 | ISCAS | Behavioural modelling, simulation, test and diagnosis of MEMS using ANNs. | Vanco B. Litovski, Mark Zwolinski, Miona Andrejevic |
| 2004 | ISCAS | Behavioural modelling of analogue faults in VHDL-AMS - a case study. | Mark Zwolinski, Andrew D. Brown |
| 2004 | VLSID | Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique. | Manoj Singh Gaur, Mark Zwolinski |
| 2003 | DATE | Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric. | Petros Oikonomakos, Mark Zwolinski, Bashir M. Al-Hashimi |
| 2003 | IOLTS | Foundation of Combined Datapath and Controller Self-checking Design. | Petros Oikonomakos, Mark Zwolinski |
| 2003 | ISCAS | The continuous-discrete interface - What does this really mean? Modelling and simulation issues. | Andrew D. Brown, Mark Zwolinski |
| 2002 | CEC | Using evolutionary and hybrid algorithms for DC operating point analysis of nonlinear circuits. | Duncan Crutchley, Mark Zwolinski |
| 2002 | DATE | Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS. | Peter R. Wilson, J. Neil Ross, Mark Zwolinski, Andrew D. Brown, Yavuz Kili |
| 2002 | IOLTS | Transformation Based Insertion of On-Line Testing Resources in a High-Level Synthesis Environment. | Petros Oikonomakos, Mark Zwolinski |
| 2001 | ISCAS | Process variation independent built-in current sensor for analogue built-in self-test. | Yavuz Kili, Mark Zwolinski |
| 2001 | ISCAS | Practical algorithms for fully decoupled mixed-mode simulation of electronic circuits. | Mark Zwolinski, R. W. Allen |
| 2000 | IDEAL | Applying Mutual Information to Adaptive Mixture Models. | Zheng Rong Yang, Mark Zwolinski |
| 1999 | DATE | Fast, Robust DC and Transient Fault Simulation for Nonlinear Analog Circuits. | Zheng Rong Yang, Mark Zwolinski |
| 1996 | DATE | Analogue Fault Modelling and Simulation for Supply Current Monitoring. | Mark Zwolinski, Chris D. Chalk, Brian R. Wilkins |