Markus Schwiegershausen
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
1991–1997
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1997 | FPL | Implementation of pipelined multipliers on Xilinx FPGAs. | Tien-Toan Do, Holger Kropp, Markus Schwiegershausen, Peter Pirsch |
| 1996 | ICASSP | A CAD tool for the optimization of video signal processor architectures. | Holger Kropp, Markus Schwiegershausen, Peter Pirsch |
| 1991 | CCC | Synthesis of intermediate memories for the data supply to processor arrays. | Mirjam Schnfeld, Markus Schwiegershausen, Peter Pirsch |