| 2026 | ISCAS | Communication-Aware Routerless NoC Design with Integer Linear Programming Approach. | Shuang Liu, Martin Radetzki |
| 2019 | FDL | A methodology to compute long-term fault resilience of NoCs under fault-tolerant routing algorithms. | Jie Hou, Martin Radetzki |
| 2019 | FDL | A Backend Tool for the Integration of Memory Optimizations into Embedded Software. | Manuel Strobel, Martin Radetzki |
| 2018 | PDP | Performability Analysis of Mesh-Based NoCs Using Markov Reward Model. | Jie Hou, Martin Radetzki |
| 2017 | MMAR | Semi-symbolic operational computation for robust control system design. | Leandro Gil, Martin Radetzki |
| 2016 | DATE | Orthogonal signal modeling and operational computation of AMS circuits for fast and accurate system simulation. | Leandro Gil, Martin Radetzki |
| 2016 | PDP | Globally Asynchronous Locally Synchronous Simulation of NoCs on Many-Core Architectures. | Marcus Eggenberger, Manuel Strobel, Martin Radetzki |
| 2015 | PDP | Fault Tolerant Routing for Hierarchically Organized Networks-on-Chip. | Gert Schley, Martin Radetzki |
| 2014 | FDL | SystemC AMS power electronic modeling with ideal instantaneous switches. | Leandro Gil, Martin Radetzki |
| 2014 | FDL | A comparison of parallel systemc simulation approaches at RTL. | Bastian Haetzer, Martin Radetzki |
| 2013 | FDL | Platform based design. | Jean-Philippe Babau, Martin Radetzki |
| 2013 | FDL | Fine grained adaptive simulation with application to NoCs. | Marcus Eggenberger, Martin Radetzki |
| 2013 | FDL | Systemc transaction level modeling with transaction events. | Bastian Haetzer, Martin Radetzki |
| 2013 | FDL | Simulation analysis and validation. | Frank Oppenheimer, Martin Radetzki |
| 2013 | PDP | Fault Localizing End-to-End Flow Control Protocol for Networks-on-Chip. | Gert Schley, Nikolaos Batzolis, Martin Radetzki |
| 2012 | CLUSTER | Low-Latency Collectives for the Intel SCC. | Adn Kohler, Martin Radetzki, Philipp Gschwandtner, Thomas Fahringer |
| 2012 | FDL | Minimal MPI as programming interface for multicore System-on-Chips. | Adn Kohler, Juan Manuel Castillo-Sanchez, Joachim Gross, Martin Radetzki |
| 2011 | DSD | Efficient Fault Simulation of SystemC Designs. | Weiyun Lu, Martin Radetzki |
| 2011 | EUC | Fault-Tolerant Differential Q Routing in Arbitrary NoC Topologies. | Martin Radetzki |
| 2011 | FDL | A case study on message-based discrete event simulation for Transaction Level Modeling. | Bastian Haetzer, Martin Radetzki |
| 2011 | FDL | A metamodel and semantics for transaction level modeling. | Rauf Salimi Khaligh, Martin Radetzki |
| 2010 | DATE | Modeling constructs and kernel for parallel simulation of accuracy adaptive TLMs. | Rauf Salimi Khaligh, Martin Radetzki |
| 2010 | FDL | A Dynamic Load Balancing Method for Parallel Simulation of Accuracy Adaptive TLMs. | Rauf Salimi Khaligh, Martin Radetzki |
| 2009 | DATE | Test exploration and validation using transaction level models. | Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Rauf Salimi Khaligh, Martin Radetzki, Hans-Joachim Wunderlich, Stefano Di Carlo, Paolo Prinetto |
| 2009 | FDL | A SystemC TLM2 model of communication in wormhole switched Networks-On-Chip. | Adn Kohler, Martin Radetzki |
| 2008 | DATE | Accuracy-Adaptive Simulation of Transaction Level Models. | Martin Radetzki, Rauf Salimi Khaligh |
| 2008 | FDL | A Latency, Preemption and Data Transfer Accurate Adaptive Transaction Level Model for Efficient Simulation of Pipelined Buses. | Rauf Salimi Khaligh, Martin Radetzki |
| 2008 | FDL | Adaptive Interconnect Models for Transaction-Level Simulation. | Rauf Salimi Khaligh, Martin Radetzki |
| 2008 | ISCAS | A data traffic efficient H.264 deblocking IP. | Weining Hao, Martin Radetzki |
| 2007 | FDL | Modelling Alternatives for Cycle Approximate Bus TLMs. | Martin Radetzki, Rauf Salimi Khaligh |
| 2006 | FDL | SystemC TLM Transaction Modelling and Dispatch for Active Object. | Martin Radetzki |
| 2004 | DATE | Measurement of IP Qualification Costs and Benefits. | Andreas Vrg, Martin Radetzki, Wolfgang Rosenstiel |
| 2003 | FDL | sciPROVE: C++ Based Verification Environment for IP and SoC Design1. | U. Badelt, H. Khl, Martin Radetzki |
| 1999 | DATE | Data Type Analysis for Hardware Synthesis from Object-Oriented Models. | Martin Radetzki, Ansgar Stammermann, Wolfram Putzke-Rming, Wolfgang Nebel |
| 1998 | ASPDAC | ATM Cell Modelling using Objective VHDL. | Alberto Allara, Massimo Bombana, Patrizia Cavalloro, Wolfgang Nebel, Wolfram Putzke-Rming, Martin Radetzki |
| 1998 | DATE | A Flexible Message Passing Mechanism for Objective VHDL. | Wolfram Putzke-Rming, Martin Radetzki, Wolfgang Nebel |
| 1996 | FPL | Development of a Telephone Answering Machine in a Lab - FPGAs in Education. | Guido Schumacher, Bernhard Josko, Gerhard Wagner, Martin Radetzki |