| 2025 | ICAART | Conceptual Approaches to Identify the Hazardous Scenarios in Safety Analysis for Automated Driving Systems. | Marzana Khatun, Florence Wagner, Rolf Jung, Michael Gla |
| 2025 | ITC | Early Reliability Estimation in Hardware Accelerators using Improved Colored Petri Nets. | Ernesto Cristopher Villegas Castillo, Felipe Augusto da Silva, Josie E. Rodriguez Condia, Juan-David Guerrero-Balaguera, Michael Gla |
| 2024 | DDECS | An Efficient Approach for STLs Development of Automotive SoCs Using Colored Petri Nets. | Ernesto Cristopher Villegas Castillo, Felipe Augusto da Silva, Michael Gla |
| 2022 | SAFECOMP | An Approach for Deriving Reduced Collision Scenarios for Highly Automated Driving Systems. | Marzana Khatun, Heinrich Litagin, Rolf Jung, Michael Gla |
| 2021 | VEHITS | A Systematic Approach of Reduced Scenario-based Safety Analysis for Highly Automated Driving Function. | Marzana Khatun, Michael Gla, Rolf Jung |
| 2020 | DATE | Design Space Exploration for Model-based Communication Systems. | Valentina Richthammer, Marcel Rie, Julian Bestler, Frank Slomka, Michael Gla |
| 2019 | VEHITS | Variety-aware Routing Encoding for Efficient Design Space Exploration of Automotive Communication Networks. | Fedor Smirnov, Behnaz Pourmohseni, Michael Gla, Jrgen Teich |
| 2018 | DAC | Architecture decomposition in system synthesis of heterogeneous many-core systems. | Valentina Richthammer, Tobias Schwarzer, Stefan Wildermann, Jrgen Teich, Michael Gla |
| 2018 | SCOPES | Automatic Optimization of Redundant Message Routings in Automotive Networks. | Fedor Smirnov, Felix Reimann, Jrgen Teich, Zhao Han, Michael Gla |
| 2017 | DAC | Optimizing Message Routing and Scheduling in Automotive Mixed-Criticality Time-Triggered Networks. | Fedor Smirnov, Michael Gla, Felix Reimann, Jrgen Teich |
| 2017 | DATE | Automatic operating point distillation for hybrid mapping methodologies. | Behnaz Pourmohseni, Michael Gla, Jrgen Teich |
| 2017 | DATE | Formal timing analysis of non-scheduled traffic in automotive scheduled TSN networks. | Fedor Smirnov, Michael Gla, Felix Reimann, Jrgen Teich |
| 2017 | RTNS | Predictable run-time mapping reconfiguration for real-time applications on many-core systems. | Behnaz Pourmohseni, Stefan Wildermann, Michael Gla, Jrgen Teich |
| 2016 | DAC | Formal reliability analysis of switched ethernet automotive networks under transient transmission errors. | Fedor Smirnov, Michael Gla, Felix Reimann, Jrgen Teich |
| 2016 | PCS | Multi-objective design space exploration for the optimization of the HEVC mode decision process. | Christian Herglotz, Rafael Rosales, Michael Gla, Jrgen Teich, Andr Kaup |
| 2016 | PLDI | ActorX10: an actor library for X10. | Sascha Roloff, Alexander Pppl, Tobias Schwarzer, Stefan Wildermann, Michael Bader, Michael Gla, Frank Hannig, Jrgen Teich |
| 2016 | SC | SWE-X10: Simulating Shallow Water Waves with Lazy Activation of Patches Using Actorx10. | Alexander Pppl, Michael Bader, Tobias Schwarzer, Michael Gla |
| 2016 | SCOPES | Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs. | Andreas Weichslgartner, Stefan Wildermann, Johannes Gtzfried, Felix C. Freiling, Michael Gla, Jrgen Teich |
| 2015 | DAC | Robust design of E/E architecture component platforms. | Sebastian Graf, Sebastian Reinhart, Michael Gla, Jrgen Teich, Daniel Platte |
| 2015 | DATE | Uncertainty-aware reliability analysis and optimization. | Faramarz Khosravi, Malte Mller, Michael Gla, Jrgen Teich |
| 2015 | DATE | Formal analysis of the startup delay of SOME/IP service discovery. | Jan R. Seyler, Thilo Streichert, Michael Gla, Nicolas Navet, Jrgen Teich |
| 2015 | SCOPES | Throughput-optimizing Compilation of Dataflow Applications for Multi-Cores using Quasi-Static Scheduling. | Tobias Schwarzer, Joachim Falk, Michael Gla, Jrgen Teich, Christian Zebelein, Christian Haubelt |
| 2014 | DAC | Multi-Objective Local-Search Optimization using Reliability Importance Measuring. | Faramarz Khosravi, Felix Reimann, Michael Gla, Jrgen Teich |
| 2014 | DAC | Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures. | Felix Reimann, Michael Gla, Jrgen Teich, Alejandro Cook, Laura Rodrguez Gmez, Dominik Ull, Hans-Joachim Wunderlich, Piet Engelke, Ulrich Abelein |
| 2014 | DATE | Non-intrusive integration of advanced diagnosis features in automotive E/E-architectures. | Ulrich Abelein, Alejandro Cook, Piet Engelke, Michael Gla, Felix Reimann, Laura Rodrguez Gmez, Thomas Russ, Jrgen Teich, Dominik Ull, Hans-Joachim Wunderlich |
| 2014 | DATE | Multi-variant-based design space exploration for automotive embedded systems. | Sebastian Graf, Michael Gla, Jrgen Teich, Christoph Lauer |
| 2014 | DATE | Connecting different worlds - Technology abstraction for reliability-aware design and Test. | Ulf Schlichtmann, Veit Kleeberger, Jacob A. Abraham, Adrian Evans, Christina Gimmler-Dumont, Michael Gla, Andreas Herkersdorf, Sani R. Nassif, Norbert Wehn |
| 2014 | DATE | A self-propagating wakeup mechanism for point-to-point networks with partial network support. | Jan R. Seyler, Thilo Streichert, Juri Warkentin, Matthias Spagele, Michael Gla, Jrgen Teich |
| 2014 | DATE | Multi-objective distributed run-time resource management for many-cores. | Stefan Wildermann, Michael Gla, Jrgen Teich |
| 2014 | DSD | Design Space Exploration for Automotive E/E Architecture Component Platforms. | Sebastian Graf, Michael Gla, Jrgen Teich, Christoph Lauer |
| 2014 | DSD | Communication-Driven Automatic Virtual Prototyping for Networked Embedded Systems. | Liyuan Zhang, Joachim Falk, Tobias Schwarzer, Michael Gla, Jrgen Teich |
| 2013 | DATE | Automatic success tree-based reliability analysis for the consideration of transient and permanent faults. | Hananeh Aliee, Michael Gla, Felix Reimann, Jrgen Teich |
| 2013 | ETFA | Timing analysis of Ethernet AVB-based automotive E/E architectures. | Felix Reimann, Sebastian Graf, Fabian Streit, Michael Gla, Jrgen Teich |
| 2013 | FDL | Bridging algorithm and ESL design: Matlab/Simulink model transformation and validation. | Liyuan Zhang, Michael Gla, Nils Ballmann, Jrgen Teich |
| 2013 | LPNMR | Symbolic System Synthesis Using Answer Set Programming. | Benjamin Andres, Martin Gebser, Torsten Schaub, Christian Haubelt, Felix Reimann, Michael Gla |
| 2012 | DAC | Considering diagnosis functionality during automatic system-level design of automotive networks. | Michael Eberl, Michael Gla, Jrgen Teich, Ulrich Abelein |
| 2012 | DATE | Designing FlexRay-based automotive architectures: A holistic OEM approach. | Paul Milbredt, Michael Gla, Martin Lukasiewycz, Andreas Steininger, Jrgen Teich |
| 2012 | SAFECOMP | Cross-Level Compositional Reliability Analysis for Embedded Systems. | Michael Gla, Heng Yu, Felix Reimann, Jrgen Teich |
| 2011 | DAC | Symbolic system synthesis in the presence of stringent real-time constraints. | Felix Reimann, Martin Lukasiewycz, Michael Gla, Christian Haubelt, Jrgen Teich |
| 2011 | FPL | Stress-Aware Module Placement on Reconfigurable Devices. | Josef Angermeier, Daniel Ziener, Michael Gla, Jrgen Teich |
| 2011 | GECCO | Opt4J: a modular framework for meta-heuristic optimization. | Martin Lukasiewycz, Michael Gla, Felix Reimann, Jrgen Teich |
| 2010 | DAC | Towards scalable system-level reliability analysis. | Michael Gla, Martin Lukasiewycz, Christian Haubelt, Jrgen Teich |
| 2010 | DATE | Robust design of embedded systems. | Martin Lukasiewycz, Michael Gla, Jrgen Teich |
| 2010 | ICCAD | Symbolic system level reliability analysis. | Michael Gla, Martin Lukasiewycz, Felix Reimann, Christian Haubelt, Jrgen Teich |
| 2009 | DAC | Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis. | Michael Gla, Martin Lukasiewycz, Jrgen Teich, Unmesh D. Bordoloi, Samarjit Chakraborty |
| 2009 | DATE | Incorporating graceful degradation into embedded system design. | Michael Gla, Martin Lukasiewycz, Christian Haubelt, Jrgen Teich |
| 2009 | DATE | Combined system synthesis and communication architecture exploration for MPSoCs. | Martin Lukasiewycz, Martin Streubhr, Michael Gla, Christian Haubelt, Jrgen Teich |
| 2008 | ASPDAC | Efficient symbolic multi-objective design space exploration. | Martin Lukasiewycz, Michael Gla, Christian Haubelt, Jrgen Teich |
| 2008 | CEC | A feasibility-preserving local search operator for constrained discrete optimization problems. | Martin Lukasiewycz, Michael Gla, Christian Haubelt, Jrgen Teich |
| 2008 | DAC | Concurrent topology and routing optimization in automotive network integration. | Martin Lukasiewycz, Michael Gla, Christian Haubelt, Jrgen Teich, Richard Regler, Bardo Lang |
| 2008 | DATE | Symbolic Reliability Analysis and Optimization of ECU Networks. | Michael Gla, Martin Lukasiewycz, Felix Reimann, Christian Haubelt, Jrgen Teich |
| 2008 | PPSN | A Feasibility-Preserving Crossover and Mutation Operator for Constrained Combinatorial Problems. | Martin Lukasiewycz, Michael Gla, Jrgen Teich |
| 2008 | SAFECOMP | Symbolic Reliability Analysis of Self-healing Networked Embedded Systems. | Michael Gla, Martin Lukasiewycz, Felix Reimann, Christian Haubelt, Jrgen Teich |
| 2007 | CEC | SAT-decoding in evolutionary algorithms for discrete constrained optimization problems. | Martin Lukasiewycz, Michael Gla, Christian Haubelt, Jrgen Teich |
| 2007 | DATE | Interactive presentation: Reliability-aware system synthesis. | Michael Gla, Martin Lukasiewycz, Thilo Streichert, Christian Haubelt, Jrgen Teich |
| 2007 | EMO | Symbolic Archive Representation for a Fast Nondominance Test. | Martin Lukasiewycz, Michael Gla, Christian Haubelt, Jrgen Teich |
| 2007 | SAT | Solving Multi-objective Pseudo-Boolean Problems. | Martin Lukasiewycz, Michael Gla, Christian Haubelt, Jrgen Teich |