Michaela Blott
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
27
Venues
13
Active years
2009–2025
Best venue rank
A*
Where they publish
Papers
27 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | FPL | FINN-GL: Generalized Mixed-Precision Extensions for FPGA-Accelerated LSTMS. | Shashwat Khandelwal, Jakoba Petri-Koenig, Thomas B. Preuer, Michaela Blott, Shanker Shreejith |
| 2024 | EuroPar | Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL. | Marius Meyer, Tobias Kenter, Lucian Petrica, Kenneth O'Brien, Michaela Blott, Christian Plessl |
| 2024 | FPL | Shedding the Bits: Pushing the Boundaries of Quantization with Minifloats on FPGAs. | Shivam Aggarwal, Hans Jakob Damsgaard, Alessandro Pappalardo, Giuseppe Franco, Thomas B. Preuer, Michaela Blott, Tulika Mitra |
| 2024 | OSDI | ACCL+: an FPGA-Based Collective Engine for Distributed Applications. | Zhenhao He, Dario Korolija, Yu Zhu, Benjamin Ramhorst, Tristan Laan, Lucian Petrica, Michaela Blott, Gustavo Alonso |
| 2021 | EuroPar | Optimized Implementation of the HPCG Benchmark on Reconfigurable Hardware. | Alberto Zeni, Kenneth O'Brien, Michaela Blott, Marco D. Santambrogio |
| 2020 | FCCM | High-Throughput DNN Inference with LogicNets. | Yaman Umuroglu, Yash Akhauri, Nicholas J. Fraser, Michaela Blott |
| 2020 | FPGA | Evaluation of Optimized CNNs on FPGA and non-FPGA based Accelerators using a Novel Benchmarking Approach. | Michaela Blott, Johannes Kath, Lisa Halder, Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Miriam Leeser, Linda Doyle |
| 2020 | FPGA | LPAC: A Low-Precision Accelerator for CNN on FPGAs. | Tianyu Zhang, Tiantian Han, Lu Tian, Yi Li, Xijie Jia, Guangdong Liu, Pingbo An, Yingran Tan, Lingzhi Sui, Shaoxia Fang, Dongliang Xie, Michaela Blott, Yi Shan |
| 2020 | FPL | LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications. | Yaman Umuroglu, Yash Akhauri, Nicholas James Fraser, Michaela Blott |
| 2020 | GECCO | Evolutionary bin packing for memory-efficient dataflow inference acceleration on FPGA. | Mairin Kroes, Lucian Petrica, Sorin Cotofana, Michaela Blott |
| 2020 | GECCO | DarwiNN: efficient distributed neuroevolution under communication constraints. | Gurshaant Singh Malik, Lucian Petrica, Nachiket Kapre, Michaela Blott |
| 2020 | ITC | FAT: Training Neural Networks for Reliable Inference Under Hardware Faults. | Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Kees A. Vissers |
| 2019 | FPGA | Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. | Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer |
| 2018 | CVPR | SYQ: Learning Symmetric Quantization for Efficient Deep Neural Networks. | Julian Faraone, Nicholas J. Fraser, Michaela Blott, Philip H. W. Leong |
| 2018 | DATE | Inference of quantized neural networks on heterogeneous all-programmable devices. | Thomas B. Preuer, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott |
| 2018 | FPL | Customizing Low-Precision Deep Neural Networks for FPGAs. | Julian Faraone, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Philip H. W. Leong, David Boland |
| 2018 | FPL | FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. | Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott |
| 2018 | PPoPP | Designing scalable FPGA architectures using high-level synthesis. | Johannes de Fine Licht, Michaela Blott, Torsten Hoefler |
| 2017 | DATE | Towards exascale computing with heterogeneous architectures. | Kenneth O'Brien, Lorenzo Di Tucci, Gianluca Durelli, Michaela Blott |
| 2017 | DATE | Architectural optimizations for high performance and energy efficient Smith-Waterman implementation on FPGAs using OpenCL. | Lorenzo Di Tucci, Kenneth O'Brien, Michaela Blott, Marco D. Santambrogio |
| 2017 | FPGA | FINN: A Framework for Fast, Scalable Binarized Neural Network Inference. | Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers |
| 2017 | ICCD | Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic. | Michaela Blott, Thomas B. Preuer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser |
| 2017 | ICONIP | Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks. | Julian Faraone, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong |
| 2015 | FCCM | Scalable 10Gbps TCP/IP Stack Architecture for Reconfigurable Hardware. | David Sidler, Gustavo Alonso, Michaela Blott, Kimon Karras, Kees A. Vissers, Raymond Carley |
| 2013 | FPL | A flexible hash table design for 10GBPS key-value stores on FPGAS. | Zsolt Istvn, Gustavo Alonso, Michaela Blott, Kees A. Vissers |
| 2012 | HOTI | A Low-Latency Library in FPGA Hardware for High-Frequency Trading (HFT). | John W. Lockwood, Adwait Gupte, Nishit Mehta, Michaela Blott, Tom English, Kees A. Vissers |
| 2009 | FCCM | Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-Based Packet Processing Systems. | Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede |