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Michele Stucchi

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

4

Active years

2002–2023

Best venue rank

B

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2023ETSStudy of Transistor Metrics for Room-Temperature Screening of Single Electron Transistors for Silicon Spin Qubit Applications.Francesco Lorenzelli, Asser Elsayed, Clement Godfrin, Alexander Grill, Stefan Kubicek, Ruoyu Li, Michele Stucchi, Danny Wan, Kristiaan De Greve, Erik Jan Marinissen, Georges G. E. Gielen
2023ITCWafer-Scale Electrical Characterization of Silicon Quantum Dots from Room to Low Temperatures.Francesco Lorenzelli, Asser Elsayed, Clement Godfrin, Alexander Grill, Stefan Kubicek, Ruoyu Li, Michele Stucchi, Danny Wan, Kristiaan De Greve, Erik Jan Marinissen, Georges G. E. Gielen
2020ETSAccurate Measurements of Small Resistances in Vertical Interconnects with Small Aspect Ratios.Michele Stucchi, Ferenc Fodor, Erik Jan Marinissen
2018ITCSolutions to Multiple Probing Challenges for Test Access to Multi-Die Stacked Integrated Circuits.Erik Jan Marinissen, Ferenc Fodor, Arnita Podpod, Michele Stucchi, Yu-Rong Jian, Cheng-Wen Wu
2015DATEImpact of interconnect multiple-patterning variability on SRAMs.Ioannis Karageorgos, Michele Stucchi, Praveen Raghavan, Julien Ryckaert, Zsolt Tokei, Diederik Verkest, Rogier Baert, Sushil Sakhare, Wim Dehaene
2010IOLTS3D integration: Circuit design, test, and reliability challenges.Nikolaos Minas, Ingrid De Wolf, Erik Jan Marinissen, Michele Stucchi, Herman Oprins, Abdelkarim Mercha, Geert Van der Plas, Dimitrios Velenis, Pol Marchal
2002DATESimple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate.Hasan Ymeri, Bart Nauwelaers, Karen Maex, David De Roest, Michele Stucchi, Servaas Vandenberghe