| 2015 | ASPDAC | Polynomial time algorithm for area and power efficient adder synthesis in high-performance designs. | Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan |
| 2014 | ISLPED | Bridging high performance and low power in processor design. | Ruchir Puri, Mihir R. Choudhury, Haifeng Qian, Matthew M. Ziegler |
| 2013 | DAC | Towards optimal performance-area trade-off in adders by synthesis of parallel prefix structures. | Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan |
| 2011 | DATE | Reliability-driven don't care assignment for logic synthesis. | Andrew Zukoski, Mihir R. Choudhury, Kartik Mohanram |
| 2010 | DATE | Analytical model for TDDB-based performance degradation in combinational logic. | Mihir R. Choudhury, Vikas Chandra, Kartik Mohanram, Robert C. Aitken |
| 2010 | DATE | TIMBER: Time borrowing and error relaying for online timing error resilience. | Mihir R. Choudhury, Vikas Chandra, Kartik Mohanram, Robert C. Aitken |
| 2010 | ICCAD | Bi-decomposition of large Boolean functions using blocking edge graphs. | Mihir R. Choudhury, Kartik Mohanram |
| 2009 | DAC | Timing-driven optimization using lookahead logic circuits. | Mihir R. Choudhury, Kartik Mohanram |
| 2009 | DATE | Masking timing errors on speed-paths in logic circuits. | Mihir R. Choudhury, Kartik Mohanram |
| 2008 | DAC | Technology exploration for graphene nanoribbon FETs. | Mihir R. Choudhury, Youngki Yoon, Jing Guo, Kartik Mohanram |
| 2008 | DATE | Approximate logic circuits for low overhead, non-intrusive concurrent error detection. | Mihir R. Choudhury, Kartik Mohanram |
| 2008 | ETS | Tunable Transient Filters for Soft Error Rate Reduction in Combinational Circuits. | Quming Zhou, Mihir R. Choudhury, Kartik Mohanram |
| 2007 | DATE | Accurate and scalable reliability analysis of logic circuits. | Mihir R. Choudhury, Kartik Mohanram |
| 2007 | DATE | Interactive presentation: Single-ended coding techniques for off-chip interconnects to commodity memory. | Mihir R. Choudhury, Kyle Ringgenberg, Scott Rixner, Kartik Mohanram |
| 2006 | ICCAD | Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques. | Mihir R. Choudhury, Quming Zhou, Kartik Mohanram |
| 2006 | VTS | Design Optimization for Robustness to Single Event Upsets. | Quming Zhou, Mihir R. Choudhury, Kartik Mohanram |
| 2005 | VLSID | Multiple Fault Testing of Logic Resources of SRAM-Based FPGAs. | Saurabh Goyal, Mihir R. Choudhury, S. S. S. P. Rao, L. Kalyan Kumar |