Mike Hutton
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
14
Venues
5
Active years
2005–2023
Best venue rank
A*
Where they publish
Papers
14 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | ISCA | Understanding and Mitigating Hardware Failures in Deep Learning Training Systems. | Yi He, Mike Hutton, Steven Chan, Robert De Gruijl, Rama Govindaraju, Nishant Patil, Yanjing Li |
| 2015 | FPL | Significant papers from the first 25 years of the FPL conference. | Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, Joo M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang |
| 2007 | FPGA | Integrating FPGAs in high-performance computing: introduction. | Paul Chow, Mike Hutton |
| 2007 | FPL | An FPGA Based Memory Efficient Shared Buffer Implementation. | Dwayne Burns, Ciaran Toal, Kieran McLaughlin, Sakir Sezer, Mike Hutton, Kevin Cackovic |
| 2007 | FPL | Equivalence Verification of FPGA and Structured ASIC Implementations. | Joachim Pistorius, Mike Hutton, Jay Schleicher, Mihail Iotov, Enoch Julias, Kumara Tharmalingam |
| 2007 | ICCAD | Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. | Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig |
| 2006 | FPL | FPGA Performance Optimization Via Chipwise Placement Considering Process Variations. | Lerong Cheng, Jinjun Xiong, Lei He, Mike Hutton |
| 2006 | FPL | FPGA Architecture Design Methodology. | Mike Hutton |
| 2006 | FPL | Placement and Timing for FPGAs Considering Variations. | Mike Hutton, Yan Lin, Lei He |
| 2006 | ICCAD | Timing model reduction for hierarchical timing analysis. | Shuo Zhou, Yi Zhu, Yuanfang Hu, Ronald L. Graham, Mike Hutton, Chung-Kuan Cheng |
| 2005 | FPGA | Efficient static timing analysis and applications using edge masks. | Mike Hutton, David Karchmer, Bryan Archell, Jason Govig |
| 2005 | FPGA | The Stratix II logic and routing architecture. | David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose |
| 2005 | FPL | Coping With Uncertainty in FPGA Architecture Design. | Boris Ratchev, Mike Hutton, David Mendel |
| 2005 | ISLPED | Challenges and opportunities for low power FPGAs in nanometer technologies. | Lei He, Mike Hutton, Tim Tuan, Steven J. E. Wilton |