| 2006 | FPGA | Yield enhancements of design-specific FPGAs. | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
| 2006 | FPL | Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs. | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
| 2006 | FPL | On Feasibility of FPGA Bitstream Compression During Placement and Routing. | Piotr Stepien, Milan Vasilko |
| 2005 | FPGA | Analysis of yield loss due to random photolithographic defects in the interconnect structure of FPGAs. | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
| 2005 | FPL | Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance Schemes. | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
| 2004 | FPL | BIST Based Interconnect Fault Location for FPGAs. | Nicola Campregher, Peter Y. K. Cheung, Milan Vasilko |
| 2002 | FCCM | System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems. | Tero Rissa, Milan Vasilko, Jarkko Niittylahti |
| 2001 | RSP | A Rapid Prototyping Methodology and Platform for Seamless Communication Systems. | Milan Vasilko, Lukas Machcek, Marek Matej, Piotr Stepien, Steve Holloway |
| 2000 | FPL | Design Visualisation for Dynamically Reconfigurable Systems. | Milan Vasilko |
| 2000 | FPL | Automatic Temporal Floorplanning with Guaranteed Solution Feasibility. | Milan Vasilko, Graham Benyon-Tinker |
| 1999 | FCCM | Improving Simulation Accuracy in Design Methodologies for Dynamically Reconfigurable Logic Systems. | Milan Vasilko, David Cabanis |
| 1999 | FPL | DYNASTY: A Temporal Floorplanning Based CAD Framework for Dynamically Reconfigurable Logic Systems. | Milan Vasilko |
| 1998 | RSP | RIFLE-62: A Flexible Environment for Prototyping Dynamically Reconfigurable Systems. | Milan Vasilko, D. Long |
| 1996 | FPL | Optically Reconfigurable FPGAs: Is this a Future Trend? | Milan Vasilko, Djamel Ait-Boudaoud |
| 1996 | FPL | Architectural Synthesis Techniques for Dynamically Reconfigurable Logic. | Milan Vasilko, Djamel Ait-Boudaoud |