| 2025 | ISCAS | Design of Linear Battery Charger with Self-Blocking Reverse Current Path for Biomedical Applications. | Wen-Hsiang Huang, Ming-Dou Ker |
| 2025 | ISCAS | SDLA-based Logarithmic Amplifier Integrated with Magnitude Discriminator and Time Discriminator for Real-Time ESD Event Detection. | Chang-Jiun Lai, Ming-Dou Ker |
| 2025 | ISCAS | Miniaturized Wirelessly-Powered Biphasic Current Stimulator for Implantable Neurostimulation. | Chang-Chun Yang, Ming-Dou Ker |
| 2024 | ISCAS | A Versatile 8-Channel High Voltage Stimulator for Comprehensive Neural Stimulation. | Kuan-Ting Lin, Ming-Dou Ker |
| 2021 | MVA | ROT-Harris: A Dynamic Approach to Asynchronous Interest Point Detection. | Shane Harrigan, Sonya A. Coleman, Ming-Dou Ker, Pratheepan Yogarajah, Zheng Fang, Chengdong Wu |
| 2019 | ISCAS | ESD Protection Design of High-Linearity SPDT CMOS T/R Switch for Cellular Applications. | Tao-Yi Hung, Ming-Dou Ker |
| 2017 | ASPDAC | Design considerations and clinical applications of closed-loop neural disorder control SoCs. | Chung-Yu Wu, Cheng-Hsiang Cheng, Yi-Huan Ou-Yang, Chiung-Ghu Chen, Wei-Ming Chen, Ming-Dou Ker, Chen-Yi Lee, Sheng-Fu Liang, Fu-Zen Shaw |
| 2014 | ISCAS | ESD protection design for wideband RF applications in 65-nm CMOS process. | Li-Wei Chu, Chun-Yu Lin, Ming-Dou Ker, Ming-Hsiang Song, Jeng-Chou Tseng, Chewnpu Jou, Ming-Hsien Tsai |
| 2014 | ISCAS | A high-voltage-tolerant stimulator realized in the low-voltage CMOS process for cochlear implant. | Kuan-Yu Lin, Ming-Dou Ker, Chun-Yu Lin |
| 2013 | ISCAS | Low-leakage power-rail ESD clamp circuit with gated current mirror in a 65-nm CMOS technology. | Federico A. Altolaguirre, Ming-Dou Ker |
| 2012 | ISCAS | Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology. | Li-Wei Chu, Chun-Yu Lin, Shiang-Yu Tsai, Ming-Dou Ker, Ming-Hsiang Song, Chewnpu Jou, Tse-Hua Lu, Jeng-Chou Tseng, Ming-Hsien Tsai, Tsun-Lai Hsu, Ping-Fang Hung, Tzu-Heng Chang |
| 2011 | ISCAS | Design of power-rail ESD clamp circuit with adjustable holding voltage against mis-trigger or transient-induced latch-on events. | Chih-Ting Yeh, Yung-Chih Liang, Ming-Dou Ker |
| 2010 | ISCAS | ESD protection circuit for high-voltage CMOS ICs with improved immunity against transient-induced latchup. | Ming-Dou Ker, Che-Lun Hsu, Wen-Yi Chen |
| 2010 | ISCAS | 2VDD-tolerant power-rail ESD clamp circuit with low standby leakage in 65-nm CMOS process. | Chun-Yu Lin, Ming-Dou Ker |
| 2009 | ISCAS | Improvement on ESD Robustness of Lateral DMOS in High-voltage CMOS ICs by Body Current Injection. | Wen-Yi Chen, Ming-Dou Ker, Yeh-Ning Jou, Yeh-Jen Huang, Geeng-Lih Lin |
| 2009 | ISCAS | On the Design of Power-rail ESD Clamp Circuit with Consideration of Gate Leakage Current in 65-nm Low-voltage CMOS Process. | Ming-Dou Ker, Po-Yen Chiu, Fu-Yi Tsai, Yeong-Jar Chang |
| 2008 | ISCAS | ESD protection design for fully integrated CMOS RF power amplifiers with waffle-structured SCR. | Ming-Dou Ker, Chun-Yu Lin, Guo-Xuan Meng |
| 2008 | ISCAS | 2xVDD-tolerant crystal oscillator circuit realized with 1xVDD CMOS devices without gate-oxide reliability issue. | Ming-Dou Ker, Tzu-Ming Wang, Hung-Tai Liao |
| 2007 | ISCAS | Design of Mixed-Voltage Crystal Oscillator Circuit in Low-Voltage CMOS Technology. | Ming-Dou Ker, Hung-Tai Liao |
| 2006 | ISCAS | Design on new tracking circuit of I/O buffer in 0.13m cell library for mixed-voltage application. | Zi-Ping Chen, Che-Hao Chuang, Ming-Dou Ker |
| 2006 | ISCAS | New matching methodology of low-noise amplifier with ESD protection. | Bo-Shih Huang, Ming-Dou Ker |
| 2006 | ISCAS | Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications. | Ming-Dou Ker, Chien-Hua Wu |
| 2005 | ISCAS | New curvature-compensation technique for CMOS bandgap reference with sub-1-V operation. | Ming-Dou Ker, Jung-Sheng Chen, Ching-Yun Chu |
| 2005 | ISCAS | Design on mixed-voltage I/O buffer with blocking NMOS and dynamic gate-controlled circuit for high-voltage-tolerant applications. | Ming-Dou Ker, Shih-Lun Chen, Chia-Sheng Tsai |
| 2005 | ISCAS | ESD protection design for I/O cells in sub-130-nm CMOS technology with embedded SCR structure. | Kun-Hsien Lin, Ming-Dou Ker |
| 2004 | ISCAS | A new Schmitt trigger circuit in a 0.13 m 1/2.5 V CMOS process to receive 3.3 V input signals. | Shih-Lun Chen, Ming-Dou Ker |
| 2004 | ISCAS | Design on mixed-voltage-tolerant I/O interface with novel tracking circuits in a 0.13-m CMOS technology. | Che-Hao Chuang, Ming-Dou Ker |
| 2004 | ISCAS | A CMOS bandgap reference circuit for sub-1-V operation without using extra low-threshold-voltage device. | Ming-Dou Ker, Jung-Sheng Chen, Ching-Yun Chu |
| 2004 | ISCAS | A new charge pump circuit dealing with gate-oxide reliability issue in low-voltage processes. | Ming-Dou Ker, Shih-Lun Chen, Chia-Sheng Tsai |
| 2004 | ISCAS | ESD protection design for IC with power-down-mode operation. | Ming-Dou Ker, Kun-Hsien Lin |
| 2003 | ISCAS | Interference of ESD protection diodes on RF performance in Giga-Hz RF circuits. | Ming-Dou Ker, Chien-Ming Lee |
| 2003 | ISCAS | Design of 2.5 V/5 V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit. | Ming-Dou Ker, Chia-Sheng Tsai |
| 2002 | ISCAS | ESD protection circuits with novel MOS-bounded diode structures. | Ming-Dou Ker, Che-Hao Chuang |
| 2002 | ISCAS | On-chip ESD protection circuit design with novel substrate-triggered SCR device in sub-quarter-micron CMOS process. | Ming-Dou Ker, Kuo-Chun Hsu |
| 2002 | ISCAS | Latchup current self-stop circuit for whole-chip latchup prevention in bulk CMOS integrated circuits. | Jeng-Jie Peng, Ming-Dou Ker, Hsin-Chin Jiang |
| 2001 | ISCAS | Design on the turn-on efficient power-rail ESD clamp circuit with stacked polysilicon diodes. | Ming-Dou Ker, Tung-Yang Chen |
| 2001 | ISCAS | ESD protection design in a 0.18-um salicide CMOS technology by using substrate-triggered technique. | Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Win |
| 2000 | ISCAS | Design and analysis of the on-chip ESD protection circuit with a constant input capacitance for high-precision analog applications. | Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Wu, Hun-Hsien Chang |
| 2000 | ISCAS | Mew diode string design with very low leakage current for using in power supply ESD clamp circuits. | Ming-Dou Ker, Wen-Yu Lo, Hun-Hsien Chang |
| 1999 | ISCAS | ESD buses for whole-chip ESD protection. | Ming-Dou Ker, Hun-Hsien Chang, Tung-Yang Chen |
| 1995 | ISCAS | Complementary-LVTSCR ESD Protection Scheme for Submicron CMOS IC's. | Ming-Dou Ker, Chung-Yu Wu, Hun-Hsien Chang, Tao Cheng, Tain-Shun Wu |