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Mohab Anis

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

27

Venues

9

Active years

2000–2012

Best venue rank

A*

Where they publish

Papers

27 indexed papers, newest first.

YearVenueTitleAuthors
2012DATEAIR (Aerial Image Retargeting): A novel technique for in-fab automatic model-based retargeting-for-yield.Ayman Yehia Hamouda, Mohab Anis, Karim S. Karim
2010DATEPractical Monte-Carlo based timing yield estimation of digital circuits.Javid Jaffari, Mohab Anis
2010DATECorrelation controlled sampling for efficient variability analysis of analog circuits.Javid Jaffari, Mohab Anis
2010FPLRobust FPGA Design under Variations.Akhilesh Kumar, Mohab Anis
2010ISCASScaling analysis of yield optimization considering supply and threshold voltage variations.Kian Haghdad, Mohab Anis
2010ISCASComparative analysis of power yield improvement under process variation of sub-threshold flip-flops.Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2010ISCASStatistical timing yield improvement of dynamic circuits using negative capacitance technique.Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2009ICCADAdaptive sampling for efficient failure probability analysis of SRAM cells.Javid Jaffari, Mohab Anis
2008DACA methodology for statistical estimation of read access yield in SRAMs.Mohamed H. Abu-Rahma, Kinshuk Chowdhury, Joseph Wang, Zhiqin Chen, Sei Seung Yoon, Mohab Anis
2008ICCADOn efficient Monte Carlo-based statistical static timing analysis of digital circuits.Javid Jaffari, Mohab Anis
2008ISCASAdvanced IC technology - opportunities and challenges.Mohab Anis
2008ISCASVariability-aware design of subthreshold devices.Rodrigo Jaramillo-Ramirez, Javid Jaffari, Mohab Anis
2008ISCASSwitching activity reduction in low power Booth multiplier.Rizwan Mudassir, Mohab Anis, Javid Jaffari
2007ASPDACA Timing-Driven Algorithm for Leakage Reduction in MTCMOS FPGAs.Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2007ISCASVariability in VLSI Circuits: Sources and Design Considerations.Mohamed H. Abu-Rahma, Mohab Anis
2007ISCASA Dual-Threshold FPGA Routing Design for Subthreshold Leakage Reduction.Rodrigo Jaramillo-Ramirez, Mohab Anis
2006DATEAn analytical state dependent leakage power model for FPGAs.Akhilesh Kumar, Mohab Anis
2006ISLPEDVariability-aware device optimization under IJavid Jaffari, Mohab Anis
2006MICRODynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units.Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2005DATEActivity Packing in FPGAs for Leakage Power Reduction.Hassan Hassan, Mohab Anis, Antoine El Daher, Mohamed I. Elmasry
2005DATEOn Statistical Timing Analysis with Inter- and Intra-Die Variations.Hratch Mangassarian, Mohab Anis
2005FPGAA leakage-aware CAD flow for MTCMOS FPGA architectures (abstract only).Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2005FPGADual-Vt FPGA design for leakage power reduction (abstract only).Akhilesh Kumar, Mohab Anis
2005ISLPEDLAP: a logic activity packing methodology for leakage power-tolerant FPGAs.Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2002DACDynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique.Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, Shawki Areibi
2002ISCASSelf-timed MOS current mode logic for digital applications.Mohab Anis, Mohamed I. Elmasry
2000ISLPEDHigh-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies.Mohamed W. Allam, Mohab Anis, Mohamed I. Elmasry