| 2014 | IOLTS | Cost-efficient of a cluster in a mesh SRAM-based FPGA. | Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel |
| 2013 | IOLTS | Fault-tolerant adaptive routing under permanent and temporary failures for many-core systems-on-chip. | Michael G. Dimopoulos, Yi Gang, Mounir Benabdenbi, Lorena Anghel, Nacer-Eddine Zergainoh, Michael Nicolaidis |
| 2012 | DDECS | Efficient link-level error resilience in 3D NoCs. | Vladimir Pasca, Saif-Ur Rehman, Lorena Anghel, Mounir Benabdenbi |
| 2011 | VTS | Localization of damaged resources in NoC based shared-memory MP2SOC, using a Distributed Cooperative Configuration Infrastructure. | Zhen Zhang, Dimitri Refauvelet, Alain Greiner, Mounir Benabdenbi, Franois Pcheux |
| 2010 | DSN | Fault tolerant communication in 3D integrated systems. | Vladimir Pasca, Lorena Anghel, Mounir Benabdenbi |
| 2010 | ETS | Configurable fault-tolerant link for inter-die communication in 3D on-chip networks. | Vladimir Pasca, Lorena Anghel, Claudia Rusu, Mounir Benabdenbi |
| 2010 | IOLTS | Distributed online software monitoring of manycore architectures. | Etienne Faure, Mounir Benabdenbi, Franois Pcheux |
| 2010 | IOLTS | Configurable serial fault-tolerant link for communication in 3D integrated systems. | Vladimir Pasca, Lorena Anghel, Claudia Rusu, Mounir Benabdenbi |
| 2010 | IOLTS | Fully distributed initialization procedure for a 2D-Mesh NoC, including off-line BIST and partial deactivation of faulty components. | Zhen Zhang, Alain Greiner, Mounir Benabdenbi |
| 2007 | VTS | At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester. | Matthieu Tuna, Mounir Benabdenbi, Alain Greiner |
| 2004 | DATE | STEPS: Experimenting a New Software-Based Strategy for Testing SoCs Containing P1500-Compliant IP Cores. | Mounir Benabdenbi, Alain Greiner, Franois Pcheux, Emmanuel Viaud, Matthieu Tuna |
| 2001 | DATE | Testing TAPed cores and wrapped cores with the same test access mechanism. | Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki |
| 2000 | DATE | CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip. | Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki |