Muhammad Yasin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
16
Venues
9
Active years
2003–2024
Best venue rank
A*
Where they publish
Papers
16 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | DATE | KRATT: QBF-Assisted Removal and Structural Analysis Attack Against Logic Locking. | Levent Aksoy, Muhammad Yasin, Samuel Pagliarini |
| 2020 | ISCAS | Multi-Objective Strategies for Stripped-Functionality Logic Locking. | Zhaokun Han, Muhammad Yasin, Jeyavijayan (JV) Rajendran |
| 2019 | ASPDAC | ScanSAT: unlocking obfuscated scan chains. | Lilas Alrahis, Muhammad Yasin, Hani Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu |
| 2019 | DATE | MixLock: Securing Mixed-Signal Circuits via Logic Locking. | Julian Leonhard, Muhammad Yasin, Shadi Turk, Mohammed Thari Nabeel, Marie-Minerve Lourat, Roselyne Chotin-Avot, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos |
| 2019 | ETS | Revisiting Logic Locking for Reversible Computing. | Nimisha Limaye, Muhammad Yasin, Ozgur Sinanoglu |
| 2019 | ICCAD | SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis. | Muhammad Yasin, Chongzhi Zhao, Jeyavijayan (JV) Rajendran |
| 2019 | ISCAS | Functional Reverse Engineering on SAT-Attack Resilient Logic Locking. | Lilas Alrahis, Muhammad Yasin, Hani Saleh, Baker Mohammad, Mahmoud Al-Qutayri |
| 2019 | VTS | Special Session: Countering IP Security threats in Supply chain. | Hassan Salmani, Tamzidul Hoque, Swarup Bhunia, Muhammad Yasin, Jeyavijayan (JV) Rajendran, Naghmeh Karimi |
| 2018 | ITC | Towards Provably Secure Logic Locking for Hardening Hardware Security Dissertation Summary: IEEE TTTC E.J. McCluskey Doctoral Thesis Award Competition. | Muhammad Yasin, Ozgur Sinanoglu |
| 2018 | VTS | ATPG-based cost-effective, secure logic locking. | Abhrajit Sengupta, Mohammed Thari Nabeel, Muhammad Yasin, Ozgur Sinanoglu |
| 2017 | ASPDAC | Security analysis of Anti-SAT. | Muhammad Yasin, Bodhisatwa Mazumdar, Ozgur Sinanoglu, Jeyavijayan Rajendran |
| 2017 | CCS | Provably-Secure Logic Locking: From Theory To Practice. | Muhammad Yasin, Abhrajit Sengupta, Mohammed Thari Nabeel, Mohammed Ashraf, Jeyavijayan Rajendran, Ozgur Sinanoglu |
| 2016 | DATE | Activation of logic encrypted chips: Pre-test or post-test? | Muhammad Yasin, Samah Mohamed Saeed, Jeyavijayan Rajendran, Ozgur Sinanoglu |
| 2016 | ICCAD | CamoPerturb: secure IC camouflaging for minterm protection. | Muhammad Yasin, Bodhisatwa Mazumdar, Ozgur Sinanoglu, Jeyavijayan Rajendran |
| 2014 | DATE | Unified, ultra compact, quadratic power proxies for multi-core processors. | Muhammad Yasin, Anas Shahrour, Ibrahim Abe M. Elfadel |
| 2003 | ICASSP | On-line laboratories for image and two-dimensional signal processing using 2D J-DSP. | Muhammad Yasin, Lina J. Karam, Andreas Spanias |