Skip to content

Nagesh Tamarapalli

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

17

Venues

2

Active years

1996–2015

Best venue rank

A

Where they publish

Papers

17 indexed papers, newest first.

YearVenueTitleAuthors
2015VLSIDTutorial T5: High Performance Low Power Designs - Challenges and Best practices in Design, Verification and Test.Nagesh Tamarapalli, Prashanth Vallur, Sachin Kulkarni
2014VLSIDApplication of Test-View Modeling to Hierarchical ATPG.Rahul Shukla, Phong Loi, Ken Pham, Arie Margulis, Kathy Yang, Nagesh Tamarapalli
2013VLSIDTutorial T10: Post - Silicon Validation, Debug and Diagnosis.Prabhat Mishra, Masahiro Fujita, Virendra Singh, Nagesh Tamarapalli, Sharad Kumar, Rajesh Mittal
2012VLSIDTutorial T3: DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield.Srikanth Venkataraman, Nagesh Tamarapalli
2008VLSIDDFM / DFT / SiliconDebug / Diagnosis.Srikanth Venkataraman, Nagesh Tamarapalli
2006ITCDiagnosis with Limited Failure Information.Yu Huang, Wu-Tung Cheng, Nagesh Tamarapalli, Janusz Rajski, Randy Klingenberg, Will Hsu, Yuan-Shih Chen
2006ITCA Rapid Yield Learning Flow Based on Production Integrated Layout-Aware Diagnosis.Martin Keim, Nagesh Tamarapalli, Huaxing Tang, Manish Sharma, Janusz Rajski, Chris Schuermyer, Brady Benware
2006ITCImproving Transition Fault Test Pattern Quality through At-Speed Diagnosis.Nandu Tendolkar, Dawit Belete, Bill Schwarz, Bob Podnar, Akshay Gupta, Steve Karako, Wu-Tung Cheng, Alex Babin, Kun-Han Tsai, Nagesh Tamarapalli, Greg Aldrich
2006VLSIDDFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield.David Abercrombie, Bernd Koenemann, Nagesh Tamarapalli, Srikanth Venkataraman
2005ITCCompression mode diagnosis enables high volume monitoring diagnosis flow.Andreas Leininger, Peter Muhmenthaler, Wu-Tung Cheng, Nagesh Tamarapalli, Wu Yang, Kun-Han Hans Tsai
2005ITCAchieving higher yield through diagnosis.Nagesh Tamarapalli
2003ITCImpact of Multiple-Detect Test Patterns on Product Quality.Brady Benware, Chris Schuermyer, Sreenevasan Ranganathan, Robert Madge, Prabhu Krishnamurthy, Nagesh Tamarapalli, Kun-Han Tsai, Janusz Rajski
2003ITCIndustrial Experience with Adoption of EDT for Low-Cost Test without Concessions.Frank Poehl, Matthias Beck, Ralf Arnold, Peter Muhmenthaler, Nagesh Tamarapalli, Mark Kassab, Nilanjan Mukherjee, Janusz Rajski
2002ITCEmbedded Deterministic Test for Low-Cost Manufacturing Test.Janusz Rajski, Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee, Rob Thompson, Kun-Han Tsai, Andre Hertwig, Nagesh Tamarapalli, Grzegorz Mrugalski, Geir Eide, Jun Qian
1999ITCLogic BIST for large industrial designs: real issues and case studies.Graham Hetherington, Tony Fryars, Nagesh Tamarapalli, Mark Kassab, Abu S. M. Hassan, Janusz Rajski
1998ITCAutomated synthesis of large phase shifters for built-in self-test.Janusz Rajski, Nagesh Tamarapalli, Jerzy Tyszer
1996ITCConstructive Multi-Phase Test Point Insertion for Scan-Based BIST.Nagesh Tamarapalli, Janusz Rajski