Naveen Suda
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
10
Venues
9
Active years
2016–2026
Best venue rank
A*
Where they publish
Papers
10 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ACL | MobileLLM-Flash: Latency-Guided On-Device LLM Design for Industry Scale Deployment. | Hanxian Huang, Igor Fedorov, Andrey Gromov, Bernard Beckerman, Naveen Suda, David Eriksson, Maximilian Balandat, Rylan Conway, Patrick Huber, Chinnadhurai Sankar, Ayushi Dalmia, Zechun Liu, Lemeng Wu, Tarek Elgamal, Adithya Sagar, Vikas Chandra, Raghuraman Krishnamoorthi |
| 2024 | ISMAR | Towards Open-World Gesture Recognition. | Junxiao Shen, Matthias De Lange, Xuhai Xu, Enmin Zhou, Ran Tan, Naveen Suda, Maciej Lazarewicz, Per Ola Kristensson, Amy Karlson, Evan Strasnick |
| 2019 | SENSYS | SenseHAR: a robust virtual activity sensor for smartphones and wearables. | Jeya Vikranth Jeyakumar, Liangzhen Lai, Naveen Suda, Mani B. Srivastava |
| 2018 | ICCAD | Enabling deep learning at the IoT edge. | Liangzhen Lai, Naveen Suda |
| 2018 | ISCA | Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Network. | Hardik Sharma, Jongse Park, Naveen Suda, Liangzhen Lai, Benson Chau, Vikas Chandra, Hadi Esmaeilzadeh |
| 2017 | ASPDAC | A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. | Minkyu Kim, Abinash Mohanty, Deepak Kadetotad, Naveen Suda, Luning Wei, Pooja Saseendran, Xiaofei He, Yu Cao, Jae-sun Seo |
| 2017 | ISCAS | A real-time 17-scale object detection accelerator with adaptive 2000-stage classification in 65nm CMOS. | Minkyu Kim, Abinash Mohanty, Deepak Kadetotad, Naveen Suda, Luning Wei, Pooja Saseendran, Xiaofei He, Yu Cao, Jae-sun Seo |
| 2016 | FPGA | Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks. | Naveen Suda, Vikas Chandra, Ganesh Dasika, Abinash Mohanty, Yufei Ma, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao |
| 2016 | FPL | Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA. | Yufei Ma, Naveen Suda, Yu Cao, Jae-sun Seo, Sarma B. K. Vrudhula |
| 2016 | ISCAS | High-performance face detection with CPU-FPGA acceleration. | Abinash Mohanty, Naveen Suda, Minkyu Kim, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao |