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Ney Calazans

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

7

Active years

2004–2014

Best venue rank

A

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2014ISCASA monitored NoC with runtime path adaptation.Edson I. Moreno, Thais Webber, Csar A. M. Marcon, Fernando Moraes, Ney Calazans
2013IOLTSParity check for m-of-n delay insensitive codes.Julian J. H. Pontes, Ney Calazans, Pascal Vivet
2012DATEAn accurate Single Event Effect digital design flow for reliable system level design.Julian J. H. Pontes, Ney Calazans, Pascal Vivet
2009DATEEvaluation on FPGA of triple rail logic robustness against DPA and DEMA.Victor Lomn, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
2007ICCDSCAFFI: An intrachip FPGA asynchronous interface based on hard macros.Julian J. H. Pontes, Rafael Soares, Ewerson Carvalho, Fernando Moraes, Ney Calazans
2007RSPSPP-NIDS - A Sea of Processors Platform for Network Intrusion Detection Systems.Luis Carlos Caruso, Guilherme Montez Guindani, Hugo Schmitt, Ney Calazans, Fernando Moraes
2007RSPHeuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs.Ewerson Carvalho, Ney Calazans, Fernando Moraes
2006FPLReconfigurable Systems Enabled by a Network-on-Chip.Leandro Mller, Ismael Grehs, Ney Calazans, Fernando Moraes
2005ASPDACMAIA: a framework for networks on chip generation and verification.Luciano Ost, Aline Mello, Jos Palma, Fernando Gehm Moraes, Ney Calazans
2004DATEMultiNoC: A Multiprocessing System Enabled by a Network on Chip.Aline Mello, Leandro Mller, Ney Calazans, Fernando Gehm Moraes