| 2025 | FPGA | Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration. | Endri Taka, Ning-Chi Huang, Chi-Chih Chang, Kai-Chiang Wu, Aman Arora, Diana Marculescu |
| 2025 | GECCO | Integrating Neural Architecture Search and Rematerialization for Efficient On-Device Learning. | Chih-Ling Chen, Kai-Chiang Wu, Ning-Chi Huang |
| 2025 | ICLR | Palu: KV-Cache Compression with Low-Rank Projection. | Chi-Chih Chang, Wei-Cheng Lin, Chien-Yu Lin, Chong-Yan Chen, Yu-Fang Hu, Pei-Shuo Wang, Ning-Chi Huang, Luis Ceze, Mohamed S. Abdelfattah, Kai-Chiang Wu |
| 2024 | CVPR | ELSA: Exploiting Layer-wise N: M Sparsity for Vision Transformer Acceleration. | Ning-Chi Huang, Chi-Chih Chang, Wei-Cheng Lin, Endri Taka, Diana Marculescu, Kai-Chiang Wu |
| 2024 | WACV | FLORA: Fine-grained Low-Rank Architecture Search for Vision Transformer. | Chi-Chih Chang, Yuan-Yao Sung, Shixing Yu, Ning-Chi Huang, Diana Marculescu, Kai-Chiang Wu |
| 2021 | VTS | An Energy-Efficient Approximate Systolic Array Based on Timing Error Prediction and Prevention. | Ning-Chi Huang, Wei-Kai Tseng, Huan-Jan Chou, Kai-Chiang Wu |
| 2019 | DATE | Sensor-Based Approximate Adder Design for Accelerating Error-Tolerant and Deep-Learning Applications. | Ning-Chi Huang, Szu-Ying Chen, Kai-Chiang Wu |
| 2017 | DATE | Analysis and optimization of variable-latency designs in the presence of timing variability. | Chang-Lin Tsai, Chao-Wei Cheng, Ning-Chi Huang, Kai-Chiang Wu |