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Nithin George

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

4

Active years

2012–2020

Best venue rank

B

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2020ICCADSuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs.Yi-Hsiang Lai, Hongbo Rong, Size Zheng, Weihao Zhang, Xiuping Cui, Yunshan Jia, Jie Wang, Brendan Sullivan, Zhiru Zhang, Yun Liang, Youhui Zhang, Jason Cong, Nithin George, Jose Alvarez, Christopher J. Hughes, Pradeep Dubey
2016FPLDesigning a virtual runtime for FPGA accelerators in the cloud.Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne
2015FCCMFast Design Space Exploration Using Vivado HLS: Non-binary LDPC Decoders.Joo Andrade, Nithin George, Kimon Karras, David Novo, Vtor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falco Paiva Fernandes
2015FPLFrom low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis.Joo Andrade, Nithin George, Kimon Karras, David Novo, Vtor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falco Paiva Fernandes
2015FPLAutomatic support for multi-module parallelism from computational patterns.Nithin George, HyoukJoong Lee, David Novo, Muhsen Owaida, David Andrews, Kunle Olukotun, Paolo Ienne
2014FPLHardware system synthesis from Domain-Specific Languages.Nithin George, HyoukJoong Lee, David Novo, Tiark Rompf, Kevin J. Brown, Arvind K. Sujeeth, Martin Odersky, Kunle Olukotun, Paolo Ienne
2012FPGAReducing the cost of floating-point mantissa alignment and normalization in FPGAs.Yehdhih Ould Mohammed Moctar, Nithin George, Hadi Parandeh-Afshar, Paolo Ienne, Guy G. F. Lemieux, Philip Brisk