Oliver Schliebusch
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
11
Venues
7
Active years
2001–2006
Best venue rank
A*
Where they publish
Papers
11 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | DATE | Automatic ADL-based operand isolation for embedded processors. | Anupam Chattopadhyay, Benedikt Geukes, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr |
| 2006 | DATE | ASIP design and synthesis for non linear filtering in image processing. | Luca Fanucci, Michele Cassiano, Sergio Saponara, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Gerd Ascheid, Rainer Leupers, Heinrich Meyr |
| 2005 | ASPDAC | A framework for automated and optimized ASIP implementation supporting multiple hardware description languages. | Oliver Schliebusch, Anupam Chattopadhyay, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Tim Kogel |
| 2005 | ICCD | Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation. | Ernst Martin Witte, Anupam Chattopadhyay, Oliver Schliebusch, David Kammler |
| 2005 | RSP | Optimization Techniques for ADL-Driven RTL Processor Synthesis. | Oliver Schliebusch, Anupam Chattopadhyay, Ernst Martin Witte, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr |
| 2004 | DATE | RTL Processor Synthesis for Architecture Exploration and Implementation. | Oliver Schliebusch, Anupam Chattopadhyay, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Mario Steinert, Gunnar Braun, Achim Nohl |
| 2003 | DAC | Instruction encoding synthesis for architecture exploration using hierarchical processor models. | Achim Nohl, Volker Greive, Gunnar Braun, Andreas Hoffmann, Rainer Leupers, Oliver Schliebusch, Heinrich Meyr |
| 2003 | DATE | Processor/Memory Co-Exploration on Multiple Abstraction Levels. | Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Achim Nohl |
| 2002 | DAC | A universal technique for fast and flexible instruction-set architecture simulation. | Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Andreas Hoffmann |
| 2002 | VLSID | Architecture Implementation Using the Machine Description Language LISA. | Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, Gunnar Braun, Heinrich Meyr |
| 2001 | ICCAD | A Methodology for the Design of Application Specific Instruction Set Processors (ASIP) using the Machine Description Language LISA. | Andreas Hoffmann, Oliver Schliebusch, Achim Nohl, Gunnar Braun, Oliver Wahlen, Heinrich Meyr |