| 2023 | DSD | Deterministic Search Strategy of Compression Codes. | Ondrej Novk |
| 2022 | DSD | Nonlinear Compression Block Codes Search Strategy. | Ondrej Novk |
| 2021 | DSD | Search Strategy of Large Nonlinear Block Codes. | Ondrej Novk |
| 2019 | DDECS | Nonlinear Compression Codes Used In IC Testing. | Ondrej Novk |
| 2019 | DSD | Combinational Decompressors with Nonlinear Codes. | Ondrej Novk, Martin Rozkovec, Jan Plva |
| 2019 | ITC | International Symposium on Design and Diagnostics of Electronic Circuits and Systems. | Zoran Stamenkovic, Alberto Bosio, Gyrgy Cserey, Ondrej Novk, Witold A. Pleskacz, Luks Sekanina, Andreas Steininger, Goran Stojanovic, Viera Stopjakov |
| 2018 | IOLTS | Test Compression Using Extended Nonlinear Binary Codes. | Ondrej Novk |
| 2017 | DDECS | Logic testing with test-per-clock pattern loading and improved diagnostic abilities. | Ondrej Novk, Zdenek Plva |
| 2017 | ETS | Extended binary nonlinear codes and their application in testing and compression. | Ondrej Novk |
| 2016 | DDECS | Sequential test decompressors with fast variable wide spreading. | Ondrej Novk, Jiri Jencek, Martin Rozkovec |
| 2016 | DSD | Test Decompressor Effectivity Improvement. | Ondrej Novk, Jiri Jencek, Martin Rozkovec |
| 2016 | ISCAS | An empirical model of UWB large-scale signal fading in neocortical research. | Ondrej Novk, Richard B. Brown |
| 2015 | DDECS | LFSR Reseeding Based Test Compression Respecting Different Controllability of Decompressor Outputs. | Ondrej Novk, Jiri Jencek, Martin Rozkovec |
| 2014 | DDECS | Test-data compression with low number of channels and short test time. | Ondrej Novk, Jiri Jencek, Martin Rozkovec |
| 2013 | DDECS | Test pattern decompression in parallel scan chain architecture. | Martin Chloupek, Jiri Jencek, Ondrej Novk, Martin Rozkovec |
| 2013 | DDECS | Relocation of reconfigurable modules on Xilinx FPGA. | Tomas Drahonovsky, Martin Rozkovec, Ondrej Novk |
| 2012 | DDECS | On test time reduction using pattern overlapping, broadcasting and on-chip decompression. | Martin Chloupek, Ondrej Novk, Jiri Jencek |
| 2012 | DDECS | An evaluation of the application dependent FPGA test method. | Martin Rozkovec, Jiri Jencek, Ondrej Novk |
| 2011 | DDECS | Test vector overlapping based compression tool for narrow test access mechanism. | Jiri Jencek, Martin Rozkovec, Ondrej Novk |
| 2010 | DSD | Reconfigurable Fault-Tolerant System Sychronization. | Jan Balach, Ondrej Novk |
| 2010 | DSD | Application Dependent FPGA Testing Method. | Martin Rozkovec, Jiri Jencek, Ondrej Novk |
| 2010 | IOLTS | Application dependent FPGA testing method using compressed deterministic test vectors. | Martin Rozkovec, Jiri Jencek, Ondrej Novk |
| 2009 | DDECS | Structural test of programmed FPGA circuits. | Martin Rozkovec, Ondrej Novk |
| 2007 | DDECS | Test Pattern Compression Based on Pattern Overlapping. | Jiri Jencek, Ondrej Novk |
| 2006 | DDECS | FPGA-based Fault Simulator. | Leos Kafka, Ondrej Novk |
| 2006 | DDECS | HW Implementation of the Backtrace Algorithm with Conflict-Driven Dynamic Reconfiguration. | Martin Stva, Ondrej Novk |
| 2006 | DSD | Using Conflict-Based On-line Learning to Accelerate the Backtrace Algorithm Implemented in HW. | Martin Stva, Ondrej Novk |
| 2005 | EDCC | COMPAS - Compressed Test Pattern Sequencer for Scan Based Circuits. | Ondrej Novk, Jir Zahrdka, Zdenek Plva |
| 2003 | DATE | Comparison of Test Pattern Decompression Techniques. | Ondrej Novk |
| 2001 | IOLTS | Test-per-Clock Testing of the Circuits with Scan. | Ondrej Novk, Jiri Nosek |
| 2000 | IOLTS | On Using Deterministic Test Sets in BIST. | Ondrej Novk, Jiri Nosek |
| 1999 | EDCC | Pseudorandom, Weighted Random and Pseudoexhaustive Test Patterns Generated in Universal Cellular Automata. | Ondrej Novk |