P. V. Ananda Mohan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
1993–2003
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2003 | ISCAS | Fast implementations of Montgomery's modular multiplication algorithm. | P. V. Ananda Mohan |
| 1996 | VLSID | A novel VLSI concurrent dual multiplier-dual adder architecture for image and video coding applications. | D. V. Poornaiah, P. V. Ananda Mohan |
| 1995 | VLSID | Design of a 3-bit Booth recoded novel VLSI concurrent multiplier-accumulator architecture. | D. V. Poornaiah, P. V. Ananda Mohan |
| 1994 | ISCAS | Novel Design for Binary to RNS Converters. | P. V. Ananda Mohan |
| 1993 | ISCAS | Novel oversampled A/D converters based on error spectrum shaping. | Y. V. Ramana Rao, P. V. Ananda Mohan |