| 2024 | ITC | From Hybrid to Integrated: The Evolution of DFT Integration in SoC Design at Intel. | Brian Pajak, Pankaj Pant, Vidya Neerkundar |
| 2024 | ITC | Functional State Extraction using Scan DFT. | Ilya Wagner, Pankaj Pant, Arani Sinha |
| 2023 | ITC | Maximizing Stress Coverage by Novel DFT Techniques and Relaxed Timing Closure. | Arani Sinha, Glenn Coln-Bonet, Michael Fahy, Pankaj Pant, Haijing Mao, Akhilesh Shukla |
| 2020 | ITC | Streaming Scan Network (SSN): An Efficient Packetized Data Network for Testing of Complex SoCs. | Jean-Franois Ct, Mark Kassab, Wojciech Janiszewski, Ricardo Rodrigues, Reinhard Meier, Bartosz Kaczmarek, Peter Orlando, Geir Eide, Janusz Rajski, Glenn Coln-Bonet, Naveen Mysore, Ya Yin, Pankaj Pant |
| 2016 | VTS | Lateral coupling faults in multi-ported register files and methods for their testing. | Dilip Bhavsar, Michael Lohmiller, Pankaj Pant |
| 2011 | ITC | Hardware hooks for transition scan characterization. | Pankaj Pant, Eric Skeels |
| 2010 | ITC | Lessons from at-speed scan deployment on an Intel Itanium microprocessor. | Pankaj Pant, Joshua Zelman, Glenn Coln-Bonet, Jennifer Flint, Steve Yurash |
| 2009 | ITC | Voltage transient detection and induction for debug and test. | Rex Petersen, Pankaj Pant, Pablo Lopez, Aaron Barton, Jim Ignowski, Doug Josephson |
| 2009 | VTS | Understanding Power Supply Droop during At-Speed Scan Testing. | Pankaj Pant, Joshua Zelman |
| 2000 | ITC | Path-delay fault diagnosis in non-scan sequential circuits with at-speed test application. | Pankaj Pant, Abhijit Chatterjee |
| 2000 | VLSID | Inductive Noise Reduction at the Architectural Level. | Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari |
| 1999 | ICCAD | Efficient diagnosis of path delay faults in digital logic circuits. | Pankaj Pant, Abhijit Chatterjee |
| 1999 | ISLPED | An architectural solution for the inductive noise problem due to clock-gating. | Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari |
| 1997 | DAC | Device-Circuit Optimization for Minimal Energy and Power Consumption in CMOS Random Logic Networks. | Pankaj Pant, Vivek De, Abhijit Chatterjee |
| 1996 | VTS | Non-robust tests for stuck-fault detection using signal waveform analysis: feasibility and advantages. | Abhijit Chatterjee, Rathish Jayabharathi, Pankaj Pant, Jacob A. Abraham |