| 2026 | DATE | Multi-Partner Project: Outcomes of the ICSC Flagship 2 Project on Architectures and Design Methodologies to Accelerate AI Workloads. | Cristina Silvano, Fabrizio Ferrandi, Serena Curzel, Daniele Ielmini, Cristian Zambelli, Sebastiano Fabio Schifano, Francesco Conti, Angelo Garofalo, Luca Benini, Maurizio Palesi, Giuseppe Ascia, Enrico Russo, Fanny Spagnolo, Pasquale Corsonello, Stefania Perri, Fabio Frustaci |
| 2025 | DATE | Multi-Partner Project: Architectures and Design Methodologies to Accelerate AI Workloads. The ICSC Flagship 2 Project. | Cristina Silvano, Fabrizio Ferrandi, Serena Curzel, Daniele Ielmini, Stefania Perri, Fanny Spagnolo, Pasquale Corsonello, Sebastiano Fabio Schifano, Cristian Zambelli, Angelo Garofalo, Francesco Conti, Luca Benini |
| 2024 | FPL | KIT: Kernel Isotropic Transformation of Bilateral Filters for Image Denoising on FPGA. | Fanny Spagnolo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri |
| 2023 | DASC | Secure and Energy-Efficient ECG Signal Monitoring in the IoT Healthcare using Compressive Sensing. | Bharat Lal, Miguel Heredia Conde, Pasquale Corsonello, Raffaele Gravina |
| 2022 | FPL | ERMES: Efficient Racetrack Memory Emulation System based on FPGA. | Fanny Spagnolo, Salim Ullah, Pasquale Corsonello, Akash Kumar |
| 2018 | ISCAS | Design of Real-Time FPGA-based Embedded System for Stereo Vision. | Stefania Perri, Fabio Frustaci, Fanny Spagnolo, Pasquale Corsonello |
| 2015 | ICCD | Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology. | Pasquale Corsonello, Stefania Perri, Fabio Frustaci |
| 2015 | WorldCIST | Novel Varactor-Loaded Phasing Line for Reflectarray Unit Cell with Large Reconfigurability Frequency Range. | Sandra Costanzo, Francesca Venneri, Antonio Raffo, Giuseppe Di Massa, Pasquale Corsonello |
| 2011 | ISCAS | Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology. | Fabio Frustaci, Pasquale Corsonello, Massimo Alioto |
| 2010 | ISCAS | A new low-power high-speed single-clock-cycle binary comparator. | Fabio Frustaci, Stefania Perri, Marco Lanuzza, Pasquale Corsonello |
| 2009 | VLSID | Design-Space Exploration of Energy-Delay-Area Efficient Coarse-Grain Reconfigurable Datapath. | Sohan Purohit, Marco Lanuzza, Stefania Perri, Pasquale Corsonello, Martin Margala |
| 2007 | DSD | Design and Implementation of a 90nm Low bit-rate Image Compression Core. | Pasquale Corsonello, Stefania Perri, Giovanni Staino, Marco Lanuzza, Giuseppe Cocorullo |
| 2007 | DSD | An efficient and optimized FPGA Feedback M-PSK Symbol Timing Recovery Architecture based on the Gardner Timing Error Detector. | Emanuele Sciagura, Paolo Zicari, Stefania Perri, Pasquale Corsonello |
| 2006 | ISCAS | An integrated countermeasure against differential power analysis for secure smart-cards. | Pasquale Corsonello, Stefania Perri, Martin Margala |
| 2006 | ISCAS | Leakage energy reduction techniques in deep submicron cache memories: a comparative study. | Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo |
| 2005 | FPL | Low-Cost Fully Reconfigurable Data-Path for FPGA-Based Multimedia Processor. | Marco Lanuzza, Stefania Perri, Martin Margala, Pasquale Corsonello |
| 2005 | ISLPED | Cost-effective low-power processor-in-memory-based reconfigurable datapath for multimedia applications. | Marco Lanuzza, Martin Margala, Pasquale Corsonello |
| 2004 | IJCNN | FPGA implementation of Bayesian neural networks for a stand-alone predictor of pollutants concentration in the air. | Salvatore Marra, Francesco Carlo Morabito, Pasquale Corsonello, Mario Versaci |
| 2003 | FPL | Variable Precision Multipliers for FPGA-Based Reconfigurable Computing Systems. | Pasquale Corsonello, Stefania Perri, Maria Antonia Iachino, Giuseppe Cocorullo |
| 2002 | PDP | Efficient Implementation of Cellular Algorithms on Reconfigurable Hardware. | Pasquale Corsonello, Giandomenico Spezzano, Giovanni Staino, Domenico Talia |