| 2018 | RC | Finding the Redundant Gates in Reversible Circuits. | Matthias Pfuhl, Jrg Ritter, Paul Molitor |
| 2010 | AAIM | Finding Good Tours for Huge Euclidean TSP Instances by Iterative Backbone Contraction. | Christian Ernst, Changxing Dong, Gerold Jger, Dirk Richter, Paul Molitor |
| 2009 | AAIM | Effective Tour Searching for TSP by Contraction of Pseudo Backbone Edges. | Changxing Dong, Gerold Jger, Dirk Richter, Paul Molitor |
| 2008 | COCOA | Algorithms and Experimental Study for the Traveling Salesman Problem of Second Order. | Gerold Jger, Paul Molitor |
| 2006 | AAIM | Some Basics on Tolerances. | Boris Goldengorin, Gerold Jger, Paul Molitor |
| 2001 | FPGA | A pipelined architecture for partitioned DWT based lossy image compression using FPGA's. | Jrg Ritter, Paul Molitor |
| 2000 | ASPDAC | An efficient heuristic for state encoding minimizing the BDD representations of the transistion relations of finite state machines. | Riccardo Forth, Paul Molitor |
| 2000 | GD | Untitled record | Wolfgang Gnther, Robby Schnfeld, Bernd Becker, Paul Molitor |
| 1999 | GD | Using Sifting for k -Layer Straightline Crossing Minimization. | Christian Matuszewski, Robby Schnfeld, Paul Molitor |
| 1998 | EuroPar | Modeling the Communication Behavior of Distributed Memory Machines by Genetic Programming. | Laura Heinrich-Litan, Ursula Fissgus, St. Sutter, Paul Molitor, Thomas Rauber |
| 1997 | DATE | Minimizing ROBDD sizes of incompletely specified Boolean functionsby exploiting strong symmetries. | Christoph Scholl, S. Melchior, Gnter Hotz, Paul Molitor |
| 1997 | VTS | Polynomial Formal Verification of Multipliers. | Martin Keim, Michael Martin, Bernd Becker, Rolf Drechsler, Paul Molitor |
| 1996 | PPSN | New Crossover Methods For Sequencing Problems. | Tolga Asveren, Paul Molitor |
| 1995 | ASPDAC | Limits of using signatures for permutation independent Boolean comparison. | Janett Mohnke, Paul Molitor, Sharad Malik |
| 1995 | ASPDAC | Communication based FPGA synthesis for multi-output Boolean functions. | Christoph Scholl, Paul Molitor |
| 1994 | VLSID | Two-Layer Wiring with Pin Preassignments is Easier if the Power Supply Nets are Already Generated. | Paul Molitor, Uwe Sparmann, Dorothea Wagner |
| 1992 | STACS | Performance Driven k-Layer Wiring. | Michael Kaufmann, Paul Molitor, Wolfgang Vogelgesang |
| 1987 | DAC | Hierarchical Design Based on a Calculus of Nets. | Bernd Becker, Gnter Hotz, Reiner Kolla, Paul Molitor, Hans-Georg Osthof |
| 1987 | STACS | On the Contact-Minimization-Problem. | Paul Molitor |