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Peter Marwedel

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

71

Venues

24

Active years

1979–2019

Best venue rank

A*

Where they publish

Papers

71 indexed papers, newest first.

YearVenueTitleAuthors
2019SCOPESCan Flexible Multi-Core Scheduling Help to Execute Machine Learning Algorithms Resource-Efficiently?Helena Kotthaus, Lea Schnberger, Andreas Lang, Jian-Jia Chen, Peter Marwedel
2016SACmmapcopy: efficient memory footprint reduction using application knowledge.Ingo Korb, Helena Kotthaus, Peter Marwedel
2015SCOPESPlasmon-based Virus Detection on Heterogeneous Embedded Systems.Olaf Neugebauer, Pascal Libuschewski, Michael Engel, Heinrich Mller, Peter Marwedel
2014DLSDynamic page sharing optimization for the R language.Helena Kotthaus, Ingo Korb, Michael Engel, Peter Marwedel
2014EMSOFTComputing maximum blocking times with explicit path analysis under non-local flow bounds.Jan C. Kleinsorge, Peter Marwedel
2014RTCSAStatic WCET analysis of the H.264/AVC decoder exploiting coding information.Chen-Wei Huang, Timon Kelter, Bjoern Boenninghoff, Jan C. Kleinsorge, Michael Engel, Peter Marwedel, Shiao-Li Tsao
2013CASESAutomatic Extraction of pipeline parallelism for embedded heterogeneous multi-core platforms.Daniel Cordes, Michael Engel, Olaf Neugebauer, Peter Marwedel
2013EMSOFTSimple analysis of partial worst-case execution paths on general control flow graphs.Jan C. Kleinsorge, Heiko Falk, Peter Marwedel
2013GIFast and Low-Cost Instruction-Aware Fault Injection.Andreas Heinig, Ingo Korb, Florian Schmoll, Peter Marwedel, Michael Engel
2013ICPPAutomatic Extraction of Task-Level Parallelism for Heterogeneous MPSoCs.Daniel Cordes, Olaf Neugebauer, Michael Engel, Peter Marwedel
2012CGOWCET-aware static locking of instruction caches.Sascha Plazar, Jan C. Kleinsorge, Peter Marwedel, Heiko Falk
2012DATEMulti-objective aware extraction of task-level parallelism using genetic algorithms.Daniel Cordes, Peter Marwedel
2012DSDMAMOT: Memory-Aware Mapping Optimization Tool for MPSoC.Olivera Jovanovic, Peter Marwedel, Iuliana Bacivarov, Lothar Thiele
2012ICCSAFeedback-Based Global Instruction Scheduling for GPGPU Applications.Constantin Timm, Markus Grlich, Frank Weichert, Peter Marwedel, Heinrich Mller
2012RTASA Unified WCET Analysis Framework for Multi-core Platforms.Sudipta Chattopadhyay, Lee Kee Chong, Abhik Roychoudhury, Timon Kelter, Peter Marwedel, Heiko Falk
2011CASESWCET-driven branch prediction aware code positioning.Sascha Plazar, Jan C. Kleinsorge, Heiko Falk, Peter Marwedel
2011ECRTSBus-Aware Multicore WCET Analysis through TDMA Offset Bounds.Timon Kelter, Heiko Falk, Peter Marwedel, Sudipta Chattopadhyay, Abhik Roychoudhury
2011EMSOFTA synergetic approach to accurate analysis of cache-related preemption delay.Jan C. Kleinsorge, Heiko Falk, Peter Marwedel
2011GIUnreliable yet useful - reliability annotations for data in cyber-physical systems.Michael Engel, Florian Schmoll, Andreas Heinig, Peter Marwedel
2011ICPADSAutomatic Extraction of Pipeline Parallelism for Embedded Software Using Linear Programming.Daniel Cordes, Andreas Heinig, Peter Marwedel, Arindam Mallik
2010CASESMNEMEE: a framework for memory management and optimization of static and dynamic data in MPSoCs.Arindam Mallik, Peter Marwedel, Dimitrios Soudris, Sander Stuijk
2010ISORCMulti-objective Exploration of Compiler Optimizations for Real-Time Systems.Paul Lokuciejewski, Sascha Plazar, Heiko Falk, Peter Marwedel, Lothar Thiele
2010ISORCWCET-Driven Cache-Aware Memory Content Selection.Sascha Plazar, Paul Lokuciejewski, Peter Marwedel
2009CGOA Fast and Precise Static Loop Analysis Based on Abstract Interpretation, Program Slicing and Polytope Models.Paul Lokuciejewski, Daniel Cordes, Heiko Falk, Peter Marwedel
2009ECRTSCombining Worst-Case Timing Models, Loop Unrolling, and Static Loop Analysis for WCET Minimization.Paul Lokuciejewski, Peter Marwedel
2009GIPldoyer fr eine ganzheitliche Betrachtung des Zusammenhangs zwischen Informationstechnologie und CO2-Produktion.Peter Marwedel
2009SCOPESAccelerating WCET-driven optimizations by the invariant path paradigm: a case study of loop unswitching.Paul Lokuciejewski, Fatih Gedikli, Peter Marwedel
2008ECRTSWCET-driven Cache-based Procedure Positioning Optimizations.Paul Lokuciejewski, Heiko Falk, Peter Marwedel
2008SCOPESWCET-driven, code-size critical procedure cloning.Paul Lokuciejewski, Heiko Falk, Peter Marwedel, Henrik Theiling
2007SCOPESOperating system integrated energy aware scratchpad allocation strategies for multiprocess applications.Robert Pyka, Christoph Fabach, Manish Verma, Heiko Falk, Peter Marwedel
2005DATEInfluence of Memory Hierarchies on Predictability for Time Constrained Embedded Software.Lars Wehmeyer, Peter Marwedel
2005GIMemory Optimization Techniques for Low-Power Embedded Processors.Manish Verma, Peter Marwedel
2004ASPDACCompiler based exploration of DSP energy savings by SIMD operations.Markus Lorenz, Peter Marwedel, Thorsten Drger, Gerhard P. Fettweis, Rainer Leupers
2004ASPDACFast, predictable and low energy memory references through architecture-aware compilation.Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefan Steinke, Urs Helmig
2004DATEPhase Coupled Code Generation for DSPs Using a Genetic Algorithm.Markus Lorenz, Peter Marwedel
2004DATECache-Aware Scratchpad Allocation Algorithm.Manish Verma, Lars Wehmeyer, Peter Marwedel
2004WCAEBridges to computer architecture education.Peter Marwedel, Birgit Sirocic
2003ASPDACData partitioning for maximal scratchpad usage.Manish Verma, Stefan Steinke, Peter Marwedel
2003DATEControl Flow Driven Splitting of Loop Nests at the Source Code Level .Heiko Falk, Peter Marwedel
2003WCAEMultimedia components for the visualization of dynamic behavior in computer architectures.Peter Marwedel, Birgit Sirocic
2002DATEAssigning Program and Data Objects to Scratchpad for Energy Reduction.Stefan Steinke, Lars Wehmeyer, Bo-Sik Lee, Peter Marwedel
2002DSDEmbedded Software: How To Make It Efficient?Peter Marwedel
2001ASPDACOptimized address assignment for DSPs with SIMD memory accesses.Markus Lorenz, David Koffmann, Steven Bashford, Rainer Leupers, Peter Marwedel
2001ICCDLow-Energy DSP Code Generation Using a Genetic Algorithm.Markus Lorenz, Rainer Leupers, Peter Marwedel, Thorsten Drger, Gerhard P. Fettweis
1999ICCADFunction inlining under code size constraints for embedded processors.Rainer Leupers, Peter Marwedel
1999VLSIDArray Index Allocation under Register Constraints in DSP Programs.Anupam Basu, Rainer Leupers, Peter Marwedel
1998ASPDACOptimized Array Index Computation in DSP Programs.Rainer Leupers, Anupam Basu, Peter Marwedel
1998DATERegister-Constrained Address Computation in DSP Programs.Anupam Basu, Rainer Leupers, Peter Marwedel
1998DATESynthesis of Communicating Controllers for Concurrent Hardware/Software Systems.Ralf Niemann, Peter Marwedel
1998VLSIDInterface Synthesis for Embedded Applications in a Co Design Environment.Anupam Basu, Raj S. Mitra, Peter Marwedel
1997ASPDACProcessor-core based design and test.Peter Marwedel
1997ASPDACBuilt-in chaining: introducing complex components into architectural synthesis.Peter Marwedel, Birger Landwehr, Rainer Dmer
1997DACCode Generation for Core Processors.Peter Marwedel
1997DATERetargetable generation of code selectors from HDL processor models.Rainer Leupers, Peter Marwedel
1996DATEA Technique for Avoiding Isomorphic Netlists in Architectural Synthesis.Peter Marwedel, Steven Bashford, Rainer Dmer, Birger Landwehr, Ingolf Markhof
1996DATEHardware/Software Partitioning using Integer Programming.Ralf Niemann, Peter Marwedel
1996ICCADAlgorithms for address assignment in DSP code generation.Rainer Leupers, Peter Marwedel
1996VLSIDInstruction-Set Modeling for ASIP Code Generation.Rainer Leupers, Peter Marwedel
1996VTSHardware-Software Co-Design for Test: It's the Last Straw!J. El-Ziq, Najmi T. Jarwala, Niraj K. Jha, Peter Marwedel, Christos A. Papachristou, Janusz Rajski, John W. Sheppard
1995DACRetargetable Self-Test Program Generation Using Constraint Logic Programming.Ulrich Bieker, Peter Marwedel
1995DATEA BDD-based frontend for retargetable compilers.Rainer Leupers, Peter Marwedel
1993ICCADTree-based mapping of algorithms to predefined structures.Peter Marwedel
1989DACIntegrated Scheduling and Binding: A Synthesis Approach for Design Space Exploration.M. Balakrishnan, Peter Marwedel
1989DACVerification of Hardware Descriptions by Retargetable Code Generation.Lothar Nowak, Peter Marwedel
1988GIEin retargierbarer Mikrocode-Compiler und seine Anwendung in Entwurfsverifikation und Architekturbewertung.Lothar Nowak, Peter Marwedel
1986DACA new synthesis for the MIMOLA software system.Peter Marwedel
1984DACThe mimola design system: Tools for the design of digital processors.Peter Marwedel
1984MICROA retargetable compiler for a high-level microprogramming language.Peter Marwedel
1982GIThe Integrated Design of Computer Systems with Mimola.Peter Marwedel
1981MICROA retargetable microcode generation system for a high-level microprogramming language.Peter Marwedel
1979DACThe MIMOLA design system: Detailed description of the software system.Peter Marwedel