| 2025 | FPL | Multiplexer Optimizations for Virtex FPGAs. | Nicolai Fiege, Martin Hardieck, Peter Zipf |
| 2025 | FPL | Improving Boolean Satisfiability-Based Modulo Scheduling. | Nicolai Fiege, Peter Zipf |
| 2023 | ISCAS | More AddNet: A deeper insight into DNNs using FPGA-optimized multipliers. | Martin Hardieck, Tobias Habermann, Fabian Wagner, Michael Mecik, Martin Kumm, Peter Zipf |
| 2022 | FCCM | Improving Energy Efficiency in Loop Pipelining by Rational-II Modulo Scheduling. | Nicolai Fiege, Patrick Sittel, Peter Zipf |
| 2022 | FPL | Optimal Binding and Port Assignment for Loop Pipelining in High-Level Synthesis. | Nicolai Fiege, Patrick Sittel, Peter Zipf |
| 2022 | FPL | Speeding Up Optimal Modulo Scheduling with Rational Initiation Intervals. | Nicolai Fiege, Patrick Sittel, Peter Zipf |
| 2020 | ASPDAC | Modulo Scheduling with Rational Initiation Intervals in Custom Hardware Design. | Patrick Sittel, John Wickerson, Martin Kumm, Peter Zipf |
| 2019 | FPGA | Reconfigurable Convolutional Kernels for Neural Networks on FPGAs. | Martin Hardieck, Martin Kumm, Konrad Mller, Peter Zipf |
| 2018 | ARITH | Karatsuba with Rectangular Multipliers for FPGAs. | Martin Kumm, Oscar Gustafsson, Florent de Dinechin, Johannes Kappauf, Peter Zipf |
| 2018 | FPL | ILP-Based Modulo Scheduling and Binding for Register Minimization. | Patrick Sittel, Martin Kumm, Julian Oppermann, Konrad Mller, Peter Zipf, Andreas Koch |
| 2017 | ARITH | Resource Optimal Design of Large Multipliers for FPGAs. | Martin Kumm, Johannes Kappauf, Matei Istoan, Peter Zipf |
| 2016 | FPL | Efficient sum of absolute difference computation on FPGAs. | Martin Kumm, Marco Kleinlein, Peter Zipf |
| 2015 | ARITH | An Efficient Softcore Multiplier Architecture for Xilinx FPGAs. | Martin Kumm, Shahid Abbas, Peter Zipf |
| 2014 | FPL | Pipelined compressor tree optimization using integer linear programming. | Martin Kumm, Peter Zipf |
| 2014 | FPL | An FPGA-optimized architecture of horn and schunck optical flow algorithm for real-time applications. | Michael Kunz, Alexander Ostrowski, Peter Zipf |
| 2014 | FPL | Pipelined reconfigurable multiplication with constants on FPGAs. | Konrad Mller, Martin Kumm, Marco Kleinlein, Peter Zipf |
| 2013 | FPL | Multiple constant multiplication with ternary adders. | Martin Kumm, Martin Hardieck, Jens Willkomm, Peter Zipf, Uwe Meyer-Baese |
| 2013 | ISCAS | Partial LUT size analysis in distributed arithmetic FIR Filters on FPGAs. | Martin Kumm, Konrad Mller, Peter Zipf |
| 2013 | ISCAS | Reconfigurable FIR filter using distributed arithmetic on FPGAs. | Martin Kumm, Konrad Mller, Peter Zipf |
| 2012 | FPL | Reduced complexity single and multiple constant multiplication in floating point precision. | Martin Kumm, Katharina Liebisch, Peter Zipf |
| 2012 | FPL | Area estimation of look-up table based fixed-point computations on the example of a real-time high dynamic range imaging system. | Michael Kunz, Martin Kumm, Martin Heide, Peter Zipf |
| 2012 | ISCAS | Pipelined adder graph optimization for high speed multiple constant multiplication. | Martin Kumm, Peter Zipf, Mathias Faust, Chip-Hong Chang |
| 2009 | FPL | Design and evaluation of an energy-efficient dynamically reconfigurable architecture for wireless sensor nodes. | Heiko Hinkelmann, Peter Zipf, Manfred Glesner |
| 2009 | FPL | An integrated tool flow to realize runtime-reconfigurable applications on a new class of partial multi-context FPGAs. | Markus Rullmann, Renate Merker, Heiko Hinkelmann, Peter Zipf, Manfred Glesner |
| 2009 | FPL | Towards a unique FPGA-based identification circuit using process variations. | Haile Yu, Philip Heng Wai Leong, Heiko Hinkelmann, Leandro Mller, Manfred Glesner, Peter Zipf |
| 2008 | FPL | Coarse-grained reconfiguration. | Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tobias Oppold, Wolfgang Rosenstiel, Alexander Thomas, Jrgen Becker, Frank Hannig, Dmitrij Kissler, Hritam Dutta, Jrgen Teich, Heiko Hinkelmann, Peter Zipf, Manfred Glesner |
| 2008 | FPL | Application-specific reconfigurable processors. | Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Gtz Kappen, Tobias G. Noll |
| 2008 | RSP | Bandwidth Requirement Determination for a Digitally Controlled Cavity Synchronisation in a Heavy Ion Synchrotron Using Ptolemy II. | Christopher Spies, Peter Zipf, Manfred Glesner, Harald Klingbeil |
| 2007 | FPL | A Power Estimation Model for an FPGA-based Softcore Processor. | Peter Zipf, Heiko Hinkelmann, Lei Deng, Manfred Glesner, Holger Blume, Tobias G. Noll |
| 2006 | DATE | A signal theory based approach to the statistical analysis of combinatorial nanoelectronic circuits. | Oliver Soffke, Peter Zipf, Tudor Murgan, Manfred Glesner |
| 2006 | FPL | Multitasking Support for Dynamically Reconfig Urable Systems. | Heiko Hinkelmann, Andreas Gunberg, Peter Zipf, Leandro Soares Indrusiak, Manfred Glesner |
| 2005 | FPL | Programmable and Reconfigurable Hardware Architectures for the Rapid Prototyping of Cellular Automata. | Peter Zipf, Oliver Soffke, Andre Schumacher, Radu Dogaru, Manfred Glesner |
| 2005 | FPL | A Hardware-in-the-Loop System to Evaluate the Performance of Small-World Cellular Automata. | Peter Zipf, Oliver Soffke, Andre Schumacher, Clemens Schlachta, Radu Dogaru, Manfred Glesner |
| 2005 | GI | Eine weiterentwickelte quasi-statische adiabatische Logikfamilie. | Clemens Schlachta, Oliver Soffke, Peter Zipf, Manfred Glesner |
| 2005 | GI | Abstrakte Modellierung der Eigenschaften von nanoelektronischen CNT-Elementen in SystemC. | Peter Zipf, Oliver Soffke, Michael Velten, Manfred Glesner |
| 2005 | ISCAS | Functional modeling techniques for a wireless LAN OFDM transceiver. | A. Petrov, Tudor Murgan, Peter Zipf, Manfred Glesner |
| 2004 | FPL | IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter. | Ralf Ludewig, Oliver Soffke, Peter Zipf, Manfred Glesner, Kong-Pang Pun, Kuen Hung Tsoi, Kin-Hong Lee, Philip Heng Wai Leong |
| 2004 | FPL | The XPP Architecture and Its Co-simulation Within the Simulink Environment. | Mihail Petrov, Tudor Murgan, Frank May, Martin Vorbach, Peter Zipf, Manfred Glesner |
| 2004 | ISCAS | Dynamic power optimization of the trace-back process for the Viterbi algorithm. | Mihail Petrov, Tudor Murgan, Abdulfattah Mohammad Obeid, Cristian Chitu, Peter Zipf, Jrg Brakensiek, Manfred Glesner |
| 2003 | FPGA | A granularity-based classification model for systems-on-a-chip. | Stephan Bingemer, Peter Zipf, Manfred Glesner |
| 2003 | FPL | Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. | Tudor Murgan, Mihail Petrov, Alberto Garca Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernard lkrug, Jrg Brakensiek |
| 2002 | FPL | Fly - A Modifiable Hardware Compiler. | Chun Hok Ho, Philip Heng Wai Leong, Kuen Hung Tsoi, Ralf Ludewig, Peter Zipf, Alberto Garca Ortiz, Manfred Glesner |
| 2002 | FPL | A Framework for Teaching (Re)Configurable Architectures in Student Projects. | Thilo Pionteck, Peter Zipf, Lukusa D. Kabulepa, Manfred Glesner |
| 2002 | FPL | Handling FPGA Faults and Configuration Sequencing Using a Hardware Extension. | Peter Zipf, Manfred Glesner, Christine Bauer, Hans Wojtkowiak |
| 2000 | FPL | System Design with Genetic Algorithms. | Christine Bauer, Peter Zipf, Hans Wojtkowiak |