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Piet Wambacq

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

19

Venues

4

Active years

1994–2021

Best venue rank

A*

Where they publish

Papers

19 indexed papers, newest first.

YearVenueTitleAuthors
2021ISCASFractional-N Sub-Sampling PLL Using a Calibrated Delay Line for Phase Noise Cancellation.Pratap Tumkur Renukaswamy, Nereo Markulic, Piet Wambacq, Jan Craninckx
2020PIMRCA flexible power model for mm-wave and THz high-throughput communication systems.Claude Desset, Piet Wambacq, Yang Zhang, Mark Ingels, Andr Bourdoux
2007DATENonlinearity analysis of Analog/RF circuits using combined multisine and volterra analysis.Jonathan Borremans, Ludwig De Locht, Piet Wambacq, Yves Rolain
2007ISCASScalable Gate-Level Models for Power and Timing Analysis.Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man
2005DATESimulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance.Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stphane Donnay
2004DACHigh-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects.Geert Van der Plas, Mustafa Badaroglu, Gerd Vandersteen, Petr Dobrovoln, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man
2004DATEDigital Ground Bounce Reduction by Phase Modulation of the Clock.Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stphane Donnay, Georges G. E. Gielen, Hugo De Man
2003DATEAnalysis and White-Box Modeling of Weakly Nonlinear Time-Varying Circuits.Petr Dobrovoln, Gerd Vandersteen, Piet Wambacq, Stphane Donnay
2003DATEBehavioral Modeling and Simulation of a Mixed Analog/Digital Automatic Gain Control Loop in a 5 GHz WLAN Receiver.Wolfgang Eberle, Gerd Vandersteen, Piet Wambacq, Stphane Donnay, Georges G. E. Gielen, Hugo De Man
2002DACClock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients.Mustafa Badaroglu, Kris Tiri, Stphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen
2002DATEAnalysis of Nonlinearities in RF Front-End Architectures Using a Modified Volterra Series Approach .Michal Goffioul, Piet Wambacq, Gerd Vandersteen, Stphane Donnay
2002DATEHigh-Frequency Nonlinear Amplifier Model for the Efficient Evaluation of Inband Distortion Under Nonlinear Load-Pull Conditions.Gerd Vandersteen, Piet Wambacq, Stphane Donnay, Frans Verbeyst
2001DATEEfficient bit-error-rate estimation of multicarrier transceivers.Gerd Vandersteen, Piet Wambacq, Yves Rolain, Johan Schoukens, Stphane Donnay, Marc Engels, Ivo Bolsens
2001DATECAD for RF circuits.Piet Wambacq, Gerd Vandersteen, Joel R. Phillips, Jaijeet S. Roychowdhury, Wolfgang Eberle, Baolin Yang, David E. Long, Alper Demir
2000DACA methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers.Gerd Vandersteen, Piet Wambacq, Yves Rolain, Petr Dobrovoln, Stphane Donnay, Marc Engels, Ivo Bolsens
2000DATECompact Modeling of Nonlinear Distortion in Analog Communication Circuits.Piet Wambacq, Petr Dobrovoln, Stphane Donnay, Marc Engels, Ivo Bolsens
1999DATEA Single-Package Solution for Wireless Transceivers.Piet Wambacq, Stphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens
1995ISCASUse of Symbolic Analysis in Analog Circuit Synthesis.Georges G. E. Gielen, Geert Debyser, Piet Wambacq, Koen Swings, Willy M. C. Sansen
1994ISCASSymbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation.Francisco V. Fernndez, Piet Wambacq, Georges G. E. Gielen, ngel Rodrguez-Vzquez, Willy M. C. Sansen