| 2026 | VLSID | Bipolar Silicon Synapse for Bidirectional Spiking Neural Networks. | Tamal Chowdhury, Pradip Mandal |
| 2025 | VLSID | Bidirectional Spiking Neuron Based Dual-Mode Signal Acquisition Front-End System. | Tamal Chowdhury, Pradip Mandal |
| 2024 | VLSID | A Neuro Inspired Pulse Density Modulator Sensing Unipolar and Bipolar Current Signals. | Tamal Chowdhury, Pradip Mandal |
| 2024 | VLSID | Use of current-mode and voltage-mode receivers together for on-chip multipoint-to-multipoint data transmission across global interconnects. | Jahnvi Singh, Nijwm Wary, Pradip Mandal |
| 2023 | ISCAS | Ultra-low Power Current Comparator. | Subrahmanyam Perumalla, Pradip Mandal |
| 2019 | VLSID | Energy Efficient Bidirectional Equalized Transceiver with PVT Insensitive Active Termination. | Antroy Roy Chowdhury, Nijwm Wary, Pradip Mandal |
| 2018 | ISCAS | Effect of Switched-Capacitor CMFB on the Gain of Fully Differential Op-Amp for Design of Integrators. | Joydeep Basu, Pradip Mandal |
| 2016 | VLSID | A Stacked VCO Architecture for Generating Multi-level Synchronous Control Signals. | Samiran Dam, Pradip Mandal |
| 2012 | VLSID | Iterative Performance Model Upgradation in Geometric Programming Based Analog Circuit Sizing for Improved Design Accuracy. | Samiran Dam, Pradip Mandal |
| 2012 | VLSID | A Fast Equation Free Iterative Approach to Analog Circuit Sizing. | Supriyo Maji, Pradip Mandal |
| 2011 | VLSID | A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter Architecture. | Mrigank Sharad, Vijaya Sankara Rao Pasupureddi, Pradip Mandal |
| 2010 | VLSID | An Improvised MOS Transistor Model Suitable for Geometric Program Based Analog Circuit Sizing in Sub-micron Technology. | Samiran DasGupta, Pradip Mandal |
| 2010 | VLSID | On-Chip Inductor-Less DC-DC Boost Converter with Non-overlapped Rotational-Interleaving Scheme. | Tamal Das, Pradip Mandal |
| 2009 | ASPDAC | An automated design approach for CMOS LDO regulators. | Samiran DasGupta, Pradip Mandal |
| 2009 | ISLPED | Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination. | P. V. Ratna Kumar, Kaushik Bhattacharyya, Tamal Das, Pradip Mandal |
| 2009 | VLSID | Switched-Capacitor Based Buck Converter Design Using Current Limiter for Better Efficiency and Output Ripple. | Tamal Das, Pradip Mandal |
| 2008 | VLSID | Integrated TIA-Equalizer for High Speed Optical Link. | Saurav Bandyopadhyay, Pradip Mandal, Stephen E. Ralph, Kenneth Pedrotti |
| 2008 | VLSID | A Low Voltage, Low Ripple, on Chip, Dual Switch-Capacitor Based Hybrid DC-DC Converter. | Kaushik Bhattacharyya, Pradip Mandal |
| 2006 | VLSID | An On-Chip Voltage Regulator with Improved Load Regulation and Light Load Power Efficiency. | R. G. Raghavendra, Pradip Mandal |
| 2005 | ISCAS | Low-power LVDS receiver for 1.3Gbps physical layer (PHY) interface. | Gunjan Mandal, Pradip Mandal |
| 2005 | ISCAS | High voltage tolerant output buffer design for mixed voltage interfaces. | Debashis Mandal, Pradip Mandal |
| 2005 | ISCAS | A single circuit solution for voltage sensors. | S. S. Prasad, Pradip Mandal |
| 2005 | VLSID | On-Chip Voltage Regulator with Improved Transient Response. | Ashis Maity, R. G. Raghavendra, Pradip Mandal |
| 2004 | ISCAS | Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation. | Gunjan Mandal, Pradip Mandal |
| 2004 | VLSID | A Narrow Pulse- Suppressing Filter For Input Buffer. | Pradip Mandal |
| 2004 | VLSID | A CMOS Beta Multiplier Voltage Reference with Improved Temperature Performance and Silicon Tunability. | S. S. Prasad, Pradip Mandal |
| 1999 | VLSID | A New Approach for CMOS Op-Amp Synthesis. | Pradip Mandal, V. Visvanathan |
| 1997 | VLSID | A Self-Biased High Performance Folded Cascode CMOS Op-Amp. | Pradip Mandal, V. Visvanathan |
| 1996 | VLSID | Design of high performance two stage CMOS cascode op-amps with stable biasing. | Pradip Mandal, V. Visvanathan |
| 1993 | ICCAD | Macromodeling of the A.C. characteristics of CMOS Op-amps. | Pradip Mandal, V. Visvanathan |