Skip to content

Pritha Banerjee

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

4

Active years

2005–2025

Best venue rank

A*

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2025VLSIDConstructing Rectilinear Steiner Minimum Tree with Conditional Generative Adversarial Network.Kritanta Saha, Pritha Banerjee, Susmita Sur-Kolay
2022VLSIDStitch-avoiding Global Routing for Multiple E-Beam Lithography.Kritanta Saha, Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay
2017ICCDPost-Layout Perturbation towards Stitch Friendly Layout for Multiple E-Beam Lithography.Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay
2013DACAn efficient and effective analytical placer for FPGAs.Tzu-Hen Lin, Pritha Banerjee, Yao-Wen Chang
2009VLSIDFloorplanning for Partial Reconfiguration in FPGAs.Pritha Banerjee, Megha Sangtani, Susmita Sur-Kolay
2007VLSIDFloorplanning in Modern FPGAs.Pritha Banerjee, Susmita Sur-Kolay, Arijit Bishnu
2005FPLFast FPGA Placement using Space-filling Curve.Pritha Banerjee, Subhasis Bhattacharjee, Susmita Sur-Kolay, Sandip Das, Subhas C. Nandy