Ravi Tej Uppu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2013–2014
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | VLSID | Better-than-Worst-Case Timing Design with Latch Buffers on Short Paths. | Ravi Kanth Uppu, Ravi Tej Uppu, Adit D. Singh, Ilia Polian |
| 2013 | VLSID | A High Throughput Multiplier Design Exploiting Input Based Statistical Distribution in Completion Delays. | Ravi Tej Uppu, Ravi Kanth Uppu, Adit D. Singh, Abhijit Chatterjee |