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Scott Y. L. Chin

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

2

Active years

2006–2011

Best venue rank

B

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2011FPGATowards scalable FPGA CAD through architecture.Scott Y. L. Chin, Steven J. E. Wilton
2009FPLAn analytical model relating FPGA architecture and place and route runtime.Scott Y. L. Chin, Steven J. E. Wilton
2009FPLImproving the memory footprint and runtime scalability of FPGA CAD algorithms.Scott Y. L. Chin, Steven J. E. Wilton
2006FPLPower Implications of Implementing Logic Using FPGA Embedded Memory Arrays.Scott Y. L. Chin, Clarence S. P. Lee, Steven J. E. Wilton